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Study On High Speed Opto-driver ASIC For High Energy Physics

Posted on:2014-01-24Degree:DoctorType:Dissertation
Country:ChinaCandidate:F T LiangFull Text:PDF
GTID:1228330398972837Subject:Physical Electronics
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Electronic equipments and devices for High Energy Particle Physics (HEP) ex-periments are always installed on detectors. Devices are impacted by the particles and radiation which are generated by collisions. ATLAS detectors are the important parts of the LHC, and all electronics of ATLAS detectors should be radiation hardened/tolerant. Because of the commercial products cannot satisfy the radiation tolerant requirements, a series of radiation tolerant Application Specific Integrated Circuit (ASIC) chips have been designed to meet the requirements.GigaBit Transceiver (GBT) is a series of radiation tolerant ASIC chips for optical communication designed by CERN with0.13-μm CMOS process. It is the current best radiation tolerant optical communication ASICs with a data rate up to5Gbps. However, the upgrade of optical link for ATLAS liquid Argon calorimeter requires a data rate up to8Gbps, and GBT cannot be used in the upgrade. To satisfy the requirements of radiation tolerant and data rate of the upgrade, we designed two Vertical-Cavity Surface-Emitting Laser (VCSEL) drivers for the optical link in this thesis.By study the mechanisms of the radiation effects, we decide to use a commercial0.25-μm Sapphire On Silicon (SOS) CMOS process as the main method to provide the radiation tolerant capability. Then, we present the design details of VCSEL driver LOCld and VCSEL array driver LOCld4. They are both radiation tolerant designs with a data rate up to8Gbps.Three bandwidth extending methods have been performed in the design to over-come the bandwidth limitation from the0.25-μm SOS CMOS process. An all CMOS transistors active inductor shunt peaking structure used in designs provides a good peak-ing performance as the passive inductor, but only takes a very small die size. The peak-ing strength can be adjusted by an external voltage, and the adjustable capability can overcome the variations from the process corners and temperatures.The preliminary tests of LOCld show that the bandwidth extending methods are functional. With8Gbps PRBS-7input, the output optical eye diagram on sampling oscilloscope has a total jitter less than30ps. In bit error ratio (BER) test, the BER can pass the10-12standard in a long time run at10Gbps. BER is1.11x10-14in15hours at10Gbps. The design of LOCld is successful. The performances are better then GBLD, the VCSEL driver in GBT.The10-Gbps VCSEL driver and VCSEL array driver are designed with SMIC65-nm CMOS process. The preliminary test results are positive. The thin gate oxide and large transistor size of VCSEL driver design can provide the radiation tolerant capability for both TID and SEE effects theoretically. However, we need more radiation tests to proof. Once proofed, the designs will be the first65-nm CMOS based radiation tolerant design in the world.In addition, we design a true random number generator (TRNG) at1-Gbps data throughput with clock jitter in digital circuits and metastable state techniques. The electrical tests show the random source is working. The TRNG has a non-constant, non-oscillating random output. However, the quality of randomness should pass the standard test in the next step. When the randomness can pass the standard test at a certain data rate, the TRNG design will be the fastest random number generator in the world.The primary innovations of the thesis are as follows.1. An8Gbps radiation tolerant VCSEL driver LOCld has been designed for the upgrade of optical link in ATLAS liquid Argon calorimeter with a commercial0.25-μm SOS CMOS process. We design the LOCld with a backward process to achieve a better performance than GBLD with an advanced process.2. We designed an all CMOS transistors active inductor shunt peaking structure to replace the on chip passive inductor with the same performance but only takes a very small die size. The adjustability of the peaking strength make it possible to overcome the variations from the process corners and temperatures.3. We use65-nm CMOS process to design the radiation tolerant VCSEL leading the radiation tolerant ASIC design to an era of65-nm process.
Keywords/Search Tags:ASIC, radiation tolerance, high-speed VCSEL driver, active inductor shuntpeaking, 65-nm CMOS process
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