Investigation On Novel SOI Power Device Structure

Silicon On Insulator（SOI）High Voltage Integrated Circui（tHVIC）attracts a greatnumber of attention due to the merits of good isolation, high integrated density, fastrespond speed and immunity to radiation. The SOI power device is the key componentin the SOI HVIC. The key parameters of the SOI power device are breakdown voltageand specific on-resistance. The reason about the limit of breakdown voltage of SOIpower device is introducing of the Buried OXide（BOX）into the device, and thedepletion layer can’t spread into the substrate. This phenomenon causes the verticalbreakdown voltage to be very low and furthermore it degrades the breakdown voltage ofthe SOI power device. On the other hand, though some methods can reduce specificon-resistance, it causes the deterioration of the RESURF effect and causes drop ofbreakdown voltage.According to the problems, this dissertation did a lot of work to resolve themmentioned before. The main work includes these aspects as follows:First, combining the Enhanced Dielectric Field（ENDIF）and REBULF principle,we proposed a Non-depletion Floating Layer（NFL）N channel SOI LDMOS structure.This structure introduces a high concentration doped layer into the conventional SOIpower device. When the device is under blocking state, NFL can’t be depleted, andbecome an equi-potential layer. This equi-potential layer can modulate the electric fieldin the SOI layer and make the electric field distribution more evenly. Meanwhile, theinterface of SOI layer and BOX generates a large number of holes. According to theGauss law, the electric field in the BOX is hence significantly boosted. Futhermore, thisburied layer is pinned to a certain voltage. When the thickness of the BOX is keepingreduced, the breakdown voltage of the SOI power device maintains the same value. Thisphenomenon can effectively alleviate the Self-Heating effect in SOI power device. Thelarge number of holes at the interface of SOI layer and BOX can shield the back-gatevoltage affecting on the breakdown voltage.Second, according to the low vertical breakdown voltage, we proposed aNon-depletion Floating Layer（NFL）P channel SOI LDMOS structure. This structure splits the BOX into two sections, with the assistance of a high concentration dopedburied layer, therefore the equivalent thickness of the BOX doubled. This breakdownvoltage of the proposed structure is boosted55%and the specific on-resistance is alsosignificantly reduced.Third, according to the specific on-resistance of the SOI power device, weproposed the charge compensated two trenches and multiple trenches N channel SOILDMOS. The two structure share the same principle, with the enhanced RESURF effect,the devices can reduce the specific on-resistance with the high breakdown voltage.Fourth, combining the high K material and the Super Junction structure, weproposed a high K SOI Super Junction LDMOS structure. This structure cansignificantly reduce the specific on-resistance with the high breakdown voltage. Thelayout area of the power device can hence greatly shrink.