Research On Optimization Of Parallel Programs For Embedded Multicore System

Low-power computing is the primary objective for the traditional embeddedsystem design. However, with embedded computing-intensive applicationscontinuing to expand, performance requirements, power consumption requirementscontinuing to increase, embedded systems have recently turned to high-performanceembedded computing (HPEC). In order to face the situation of increasingcomplexity in embedded applications, chip multi-processor (CMP) can be used asan effective solution for high-performance embedded computing. It combines somemoderate performance processing cores to improve the energy efficiency. And italso makes use of high task-level parallelism or thread level parallelism to improvethe whole performance of the applications. In the embedded computing field, howto take full advantage of CMP which brings high-performance and low-powertechnology in the embedded multicore platform is becoming a great challenge forparallel applications.Low-power consumption and high performance are the core issues in theembedded multi-core systems. However, if we can not make full use of the on-chipmulti-core technology and applications to the parallel computing, it will causenegative impact for the performance of a variety of applications, and result in wasteof resources and energy. This situation is intolerable in the embedded field, wherethe resources and energy consumption is critical. Therefore, for embeddedapplications, the design and implementation of high-performance and low-powerparallel computing are one of core issues whether the embedded multicore systemcan be used widely.For these reasons, this thesis takes the in-depth analysis of the current high-performance embedded computing, and focuses on the design of parallel compiler inembedded multicore platform and the methods of parallel optimization. The maincontributions and technological innovation are as follows:First, an OpenMP parallel compiler framework for the embedded multi-coreplatform is proposed. And an OpenMP parallel guidance statement is extended forOpenMP parallel programs optimization on this basis. This compiler is a source-to-source compiler for embedded multi-core platform based on the shared memoryparallel programming model OpenMP. It is designed and implemented in the eCosembedded system. On this basis, an optimization algorithm based on the embeddedmulticore hierarchical storage structure is proposed for the OpenMP parallel loops.Then the OpenMP loop parallel guidance statement: tiling is extended for theembedded multicore platform. The availability and performance of the extended statement is verified by experiments.Second, a run-time dynamic optimization framework for the parallelapplications on the embedded multi-core systems is proposed. Continuing toincrease the number of running threads for multi-threaded parallel programs whichare affected by the factors in bandwidth, data competition and data impropersynchronization, may result in performance degradation for the applications. Thisthesis presents a performance analysis model based on the parallel programstructure. This model divides the parallel programs into fully parallel sections andthe critical sections. This framework can gain the number of threads when parallelapplications have the best performance by the dynamic analysis at runtime. In orderto reduce the waste of performance and energy which is caused by the unbalancedload among the threads, this thesis also proposes the dynamic scheduling methodbased on the runtime framework. This method is used to select the properscheduling scheme dynamically for the the parallel loops and adjust schedulingchunk size to achieve a balanced performance based on the load status amongthreads. This runtime optimization framework based on embedded multicoreplatform is validated and evaluated. The experiments show that this runtimeoptimization framework is suitable for parallel applications on embedded multicoresystems to improve performance.Third, a low-power execution model based on multithread load imbalance forthe parallel programs is proposed. In order to avoid the waste of energyconsumption in embedded multicore platform due to load imbalance of parallelthreads, this thesis first analyses the load of parallel threads performance, combinesthe dynamic voltage and frequency scaling (DVFS) technique, and proposes a low-power model for multithread execution. Then, this thesis also proposes an algorithmfor controling frequency which threads executed at based on this low-power model.The run-time system can dynamically adjust the thread operating frequencyaccording to the load imbalance situations of the parallel threads. This algorithmcan reduce the energy consumption without affecting the performance of the parallelprograms. Finally, this model is validated on simulation-based embedded multi-coreplatform. The experiments show that the proposed low-power execution model cansave an average of13%of the energy consumption for parallel applications onembedded multicore platform with the case of the2.2%loss of performance.Fourth, this thesis proposes a feedback DVFS method based on the energyefficiency. According to the characteristics of parallel applications, this thesisimplements a feedback framework guiding DVFS based on energy efficiency. Thismethod takes the performance and energy consumption into account. So this thesistakes the energy-delay product (EDP) as the main metrics, and determines the per-core DVFS level at the beginning of parallel programs running. Without affecting the performance of applications, this method and reduce energy consumption andimprove energy efficiency. Finally, the feedback DVFS is validated and evaluatedby experiments.