Research On Design And Hardware Implementation Technology For Multimedia Chaotic Secure Communication Systems

Chaotic secure communication is the research direction of chaotic cipher and information security cross-fusion.Some achievements have been made in the field of computer network,electrical system,laser communication and neural networks.As a new discipline,chaotic secure communication is still in its infancy in theoretical research,secure analisys,standard setting and technical realization.With the increasing demand for personal privacy protection in the field of multimedia network communication,how to design a safe and efficient multimedia chaotic secure communication system has become a research hotspot.Therefore,this paper further studied the design and implementation of a multimedia chaotic secure communication system,the main works are given as follow:1.An embedded video chaotic secure communication method with encryption after H.264 encoding is proposed.First,a non-degenerate discrete time hyperchaotic system is obtained by anti-controlling a three-dimensional nonlinear nominal matrix and the corresponding chaotic stream cipher algorithm is constructed.Self-synchronization between the encryption algorithm and the decryption algorithm is theoretically proven.Then,H.264 format video data is encrypted by chaotic stream cipher,and then position of the encrypted data is further scrambled.Finally,multi-core multi-threading,hardware encoder,format protection and adaptive memory selection are employed to solve a series of technical problems with hardware implementation.The hardware experiment results and safety analysis results prove the feasibility and effectiveness of the scheme.2.A method for H.264 selective chaotic encryption and ARM implementation is discussed.First,a non-degenerate discrete time hyperchaotic system is achieved based on a six-dimensional nonlinear nominal matrix and the corresponding chaotic stream cipher algorithm is constructed.Then the key valuables such as the difference components of motion vectors in both the horizontal and vertical directions,as well as the DC transform coefficients are selectively encrypted during H.264 encoding.Finally,multi-core multi-process is used to improve the real-time performance in the hardware implementation process.Hardware test results and security analysis results show security of the algorithm and effectiveness of the hardware implementation.3.A design and implementation method of SOPC(System on a Programmable Chip)technology for video chaotic secure communication system is proposed.In a cryptographic algorithm based on non-degenerate three-dimensional discrete time chaotic anti-control system,one of the chaotic valuables is selected for molding and rounding operation and a sequence of data width 8 bits is constructed.The sequence is used to encrypt plaintext and the ciphertext is fed back to the chaotic system.However,most of the secret keys are easily deciphered under joint attack in conquering attack,known plaintext attack,and selecting ciphertext attack.Therefore,multiple valuables instead of single valuable are performed molding and rouding operation on,and the cipher algorithm becomes more complicated and has better resistance against the above attacks.In the SOPC hardware implementation,the RGB pixel values are encrypted and some technical methods such as software and hardware co-design,direct memory access,FPGA parallel design and dual core processing,are adopted to solve hardware implementation issues and real time issues.Hardware realization results and security analysis results show the security and feasibility of the algorithm.4.An improved algorithm of chaotic stream cipher is studied and applied to design and SOPC-based hardware implementation of an electronic file encryption system.First,by using chaotic anti-control method,a three-dimensional discrete-time hyperchaotic system is constructed,and then a six-dimensional discrete-time hyperchaotic system is obtained based on.two three-dimensional discrete-time hyperchaotic systems.Chaotic valuables are performed nonlinear operation and the operation results are molded and rounded.Ciphertext is fed back to the hyperchaotic system.Self-synchronization relationship between the encryption algorithm and the decryption algorithm is proven in theory.Then,the improved algorithm is employed to encrypt and decrypt a kind of multimedia files with format and data distributing independently.Finally,the encryption algorithm,decryption algorithm and host computer communication are realized on the SOPC hardware platform.This method provides a reference example for the practical application of chaotic secure communication system.5.Design and implementation method for a video chaotic secure communication system based on FPGA technology is studied.First,chaotic stream cipher is constructed based on seven-dimensional discrete-time hyperchaotic system.Encryption sequence is generated by taking chaotic variables for nonlinear operation,molding and rounding.Three different encryption sequences are used to encrypt the RGB three primary color pixel values of the video in parallel.Three ciphertext sequences are fed back to encryption equation and decryption equation.Technical methods such as pipeline design,state machine,parallel design and direct memory access are introduced and the resource and speed advantages of high-end FPGA chips are taken,therefore,the full functionality of the remote video chaotic secure communication system is integrated into a single FPGA chip.Hardware test results and security analysis results show the security and effectiveness of the algorithm.