Carbon nanotube and graphene device modeling and simulation

The performance of the semiconductors has been improved and the price has gone down for decades. It has been continuously scaled down in size year by year, and now it encounters the fundamental scaling limit. We, therefore, should prepare a new era beyond the conventional semiconductor technologies. One of the most promising devices is possible by carbon nanotube (CNT) or graphene nanoribbon (GNR) in terms of its excellent charge transport properties. Their fundamental material properties and device physics are totally different to those of the conventional devices. In this nano-regime, more sophisticated device modeling and simulation are really needed to elucidate nano-device operation and to save our resources from errors. The numerical simulation works in this dissertation will provide novel view points on the emerging devices.;In this dissertation, CNT and GNR devices are numerically studied. The first part of this work is on CNT devices, and a common structure of CNT device has CNT channel, metal source and drain contacts, and gate electrode. We investigate the strain, geometry, and scattering effects on the device performance of CNT field-effect transistors (FETs). It is shown that even a small amount of strain can result in a large effect on the performance of CNTFETs due to the variation of the bandgap and band-structure-limited velocity. A type of strain which produces a larger bandgap results in increased Schottky barrier (SB) height and decreased band-structure-limited velocity, and hence a smaller minimum leakage current, smaller on current, larger maximum achievable Ion/Ioff, and larger intrinsic delay. We also examine geometry effect of partial gate CNTFETs. In the growth process of vertical CNT, underlap between the gate and the bottom electrode is advantageous for transistor operation because it suppresses ambipolar conduction of SBFETs. Both n-type and p-type transistor operations with balanced performance metrics can be achieved on a single partial gate FET by using proper bias schemes. The effect of phonon scattering on the intrinsic delay and cut-off frequency of Schottky barrier CNTFETs is also examined. Carriers are mostly scattered by optical and zone boundary phonons beyond the beginning of the channel. The scattering has a small direct effect on the DC on current of the CNTFET, but it results in significant decrease of intrinsic cut-off frequency and increase of intrinsic delay. Semiconducting CNT is useful for the channel in CNTFETs, whereas metallic CNT can be used as an electrode. If a porous CNT film is used as a source electrode, vertical thin-film transistors (TFTs) can be constructed. Vertical organic FET (OFET) shows clear transistor switching behavior allowing orders of magnitude modulation of the source-drain current even in the presence of electrostatic screening by the source electrode. The channel length should be carefully engineered due to the trade-off between device characteristics in the subthreshold and above-threshold regions.;The second subject is device simulations of GNRFETs. Even though GNR is also graphene-based quasi-1D nanostructure like CNT, the differences in shape, boundary condition, and existence of edges and dangling bonds make it operate in a different way. Atomistic 3D simulation study of the performance of GNR SBFETs is presented. The impacts of non-idealities on device performance have been investigated. The edges of GNR, which do not exist in CNT, can be advantages or disadvantages. If an appropriate control by different edge atoms is possible, it would be definitely positive. Totally new electronic band structure is obtained by different edge-termination atoms. In addition, only a fraction of impurity atom can also much affect on the material properties of GNR. In order to perform device simulations of non-uniform GNR devices, multiscale simulation scheme can be used in non-equilibrium Green's function (NEGF) formalism and density-functional method.