Metal oxide thin film transistor(MO TFT)has the following advantages:1)moderate carrier mobility,2)good uniformity of large area,3)low process temperature,and 4)highly transparent for visible light,which is considered to be one of the most promising new technologies in the next generation displays and emerging flexible applications.However,with the development of new display technology towards large size,ultra-high definition,high frame rate and flexible applications,TFT,as a component of the display panel,is required to be reduced in size and channel length,so as to ensure that it can provide enough electrical driving capacity while being miniaturized.Meanwhile,the proposed high mobility MO materials,such as In Ga ZnO,In Sn ZnO and In ZnO,all contain In element,which is an expensive rare metal and toxic to the environment.Thus a investigation is necessary for high performance MO materials without In element.In order to solving above key issues,this thesis aims to develop low-cost,miniaturized and high-performance MO TFT,focuses on the improvement of active layer materials and device structure,and study about vertical TFT(V-TFT)structure and in-situ F-doped Zn SnO(ZTO:F)TFT emphatically.The main research contents and results are as follows:Aiming at the bottleneck problem of lateral channel TFTs miniaturization,V-TFTs using ITO-stabilized ZnO as the active layer material and laminated structure(TEOS-Si O2+Si H4-Si O2)as the gate medium layer were proposed and successfully fabricated.The key issues of high gate leakage current and off-state current generally existed in V-TFTs are solved.The prepared devices with a channel length of 300 nm exhibit low gate leakage current and off-state current,and the values are controlled in the order of 10-13~10-14 A.The main reasons are that the TEOS-Si O2+Si H4-Si O2 laminates with less trap state density and robust dielectric strength can improve the quality of gate dielectric layer and reduce the gate leakage current in V-TFTs.Optimizing the etching process of spacer layer and adopting channel materials with low defect density and high electrical properties can improve the back-channel effect and reduce the off-state current of V-TFTs.The low frequency C-V characteristic method is used to extract the channel defect distribution,which further verified that the proposed material and process optimization methods are beneficial to improve the channel performance of V-TFTs.In order to understand the influence of structure design on device performance,the gate number,S/D contact,S/D overlap,and channel length designs of V-TFT were studied and discussed by preparing V-TFTs with different types of structure design and combining with Silvaco TCAD analysis.The results show that increasing the contact area between the active layer and S/D region can reduce the S/D contact resistance,thus affecting the drain current across the threshold region.When the channel length is shortened to deep submicron size,the electrostatic coupling between the S/D will lead to the decrease of the S/D barrier.This leads to the leakage induced barrier reduction effect of V-TFT.Whether in DC or AC mode,reducing the S/D overlap area of V-TFT can weaken the influence of S/D electric field on channel potential,enhance the control ability of gate to channel,and improve the switching speed of the device.In view of the high cost and unenvironmental protection of MO materials containing In element,a method of co-sputtering with SnO2:F(FTO)targets and ZnO target was proposed to prepare the in-situ F doping of ZTO material successfully,which is a simple,low damage and effective F doping method.ZTO:F TFTs with good electrical properties were prepared by using this material as an active layer.The effects of annealing temperature,FTO deposition power,oxygen partial pressure and sputtering pressure on the microstructure of ZTO:F films and the electrical properties of devices were also studied.The results show that,compared with the commonly used plasma F-doping method,the F-doping method proposed in this thesis can avoid plasma damage and form in-situ doping to the bulk channel region,thus effectively improving the material and device properties.Increasing the annealing temperature,choosing appropriate FTO deposition power and sputtering pressure,and reducing the oxygen partial pressure can effectively control the inherent defects and the related forms and combinations of F in ZTO:F thin films,and improve the film interface and the density of defect states in the body,which is conducive to the improvement of the device performance.ZTO:F TFTs with good electrical properties was successfully prepared by optimizing the above process conditions,which exhibit a saturation mobility of 14.2 cm2V-1s-1,extremely low subthreshold swing of 87 m V/decade,and on-off ratio of over 109.The noise characteristics and operational stability of ZTO:F TFTs were studied and analyzed.The noise parameters of ZTO:F TFTs and the defect state density at the channel/dielectric layer interface were obtained byΔN-Δμoptimization model of 1/f noise.The optimal process conditions based on the analysis of noise characteristics are consistent with the conclusion of electrical characteristics.Hooge parameter extraction results show that the prepared ZTO:F TFTs have the comparable noise properties as polysilicon,In ZnO and IGZO TFTs.The environment,temperature and bias stability test results of ZTO:F TFTs show that the transfer characteristics of devices are basically unchanged after 4 weeks in the atmospheric environment with humidity of 80%,theΔVth under thermal stress of 40~80 oC is only 0.3 V,theΔVth under positive gate bias stress is 2.8 V,and the Vth shifts under negative gate bias stress are not more than±0.1 V even without any passivation.This is due to the compensation of the defect state in the film and the passivation of the interface state by F doping,which effectively inhibits the random capture of charge near the channel/dielectric layer interface,and plays an important role in improving the noise characteristics and operational stability. |