Research On Modeling And Parameter Extraction Of Microwave MOSFET Of Silicon CMOS Process

The continued development of CMOS technology and the emergence of new applications make the CMOS technology an important choice for microwave integrated circuits for its low cost,low power consumption and high integration.The applications of the CMOS technology in microwave integrated circuits and systems are strongly linked to the accurate modeling and parameter extraction of devices.Simultaneously,the continued scaling of CMOS process poses great challenges for the research and development of compact models of integrated semiconductor devices.The widely used MOSFET compact models have disadvantages in microwave yet,such as incomplete characterization,insufficient model precision,and the accuracy of model parameter extraction is still insufficient.Based on the above issues,this thesis will carry out the technology research of S-parameter on-chip measurement,modeling and parameter extraction of the deep sub-micron CMOS process devices.The main tasks can be summarized as follows:Firstly,a set of MOSFET test structures and grounded coplanar waveguides(GCPWs)are designed,fabricated and measured.To get accurate modeling data,we evaluate the advantages of simplified distributed four-port de-embedding methods in comparison with the open-short de-embedding technique.An electromagnetic simulation aided de-embedding(EMSAD)technique is proposed innovatively.The de-embedded results of the proposed technique are used as reference for modeling of passive components at microwave frequencies.At the same time,the applicability of the open-short de-embedding method is verified,which laid a good foundation for subsequent research work of modeling and parameter extraction.Secondly,we propose a complete MOSFET small-signal equivalent circuit model.A RC branch is added to model the coupling effects arising from non-ideality parasitics in high frequency region between gate and drain.To improve the efficiency of multi-parameter optimization,a new genetic algorithm(GA)optimization technique is developed to optimize all of the MOSFET model parameters simultaneously,thus reducing the processing time,and the optimized parameters can guide us to improve the direct parameter extraction method in further research.Thirdly,based on the device physical mechanisms,a novel multi-parameter scanning(MPS)parameter extraction technique for the off-state MOSFET small-signal equivalent circuit is proposed.The MPS technique is used to accurately extract crucial parasitic parameters by single or multiple parameter scans and linear regression without using any high frequency or low frequency approximations.In addition,a nonlinear fitting extraction technique of rational function is researched of the above small-signal equivalent circuit.It implements a general direct extraction strategy for broadband application.These two parameter extraction techniques make up for the shortcomings caused by approximate extraction of physical parameters in equivalent circuits,with the two methods verifying and complementing each other.A set of NMOS transistor test structures fabricated on Shanghai Huali Microelectronics Corporation(HLMC)RF CMOS process with different device sizes and bias conditions are measured and investigated,thus demonstrating the accuracy and effectiveness of the model and parameter extraction.In summary,a series of the de-embedding methods,models and parameter direct extraction techniques for microwave MOSFET modeling proposed in this thesis,solve the problem of on-chip de-embedding for microwave devices and improve the modeling integrity of the microwave MOSFET,break through limitations of inaccurate or inefficient modeling extraction and low optimization efficiency in the existing parameter extraction methodologies.The proposed methods can be widely used in RF MOSFET compact modeling extraction,and therefore are of important practical significance in the improvement and microwave integrated circuit design and optimization of the deep sub-micron CMOS process technologies.