Realtime Beamforming Algorithm Design And Hardware Implementation In Portable Multibeam Echo Sounder

Multibeam echo sounder system is a kind of sea bed surveying instruments which can work efficiently and accurately. Its development was originally based on single beam echo sounder. This kind of system is very suitable for massive sea floor surveying.To provide a fast comutational ablilty, high resolution beams is a primary reqirmentin in a Mulitbeam echo sounder system. Digital phase-shift beamforming of narrow-band signals from uniform collinear hydrophone arrays may be accomplished by computationally efficient discrete Fourier transform(DFT) algorithms. However, phase shift beamforming is a valid approximation to delay-and-sum steering only over a restricted bandwith limited by array aperture and steering angle. A multiple-beam digital beamforming technique is described which is a hybrid of phase-shift and time-delay operations designed for bandwidths in excess of the phase-shift limit. The beam former employs fast DFTs for phase-shifting, organized according to a particular decomposition of the array into sub arrays, plus a limited amount of delay steering by interpolation. The result is a substantial reduction in the number of digital arithmetic operations compared with the alternative of delay -and-sum steering by interpolation.Beam forming is kind of data intensive algorithms. With the increasing number of hydrophone and number of beams which should be generated, the burden of hardware becomes heavy leading to a non-real time condition. In the duration of echo sound pulse, the time used to beam form is limited in order to save more time to consequent beam analysis. It is need, therefore, to design an array processors platform. Fortunately, Phase-shift and time-delay hybrid beam forming has its internal parallel architecture, which can be efficiently implemented on an array processors platform. In this thesis, we described a high speed hardware using multi-DSP processors-TMS320C6711. Some keyalgorithms were also under evaluation.TMS320C6711 is a powerful floating-point DSP which is belong to TMS320C6000?family of Texas Instruments (TI). The C6711 device is based on the high-performance, advanced very-long-instruction-word (VLIW) architecture, making these DSPs an excellent choice for multichannel and multifunction applications. With performance of up to 900 million floating-point operations per second (MFLOPS) at a clock rate of 150 MHz, the C6711 device offers cost-effective solutions to high-performance DSP programming challenges. The C6711 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. This processor has 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide four floating-/fixed-point ALUs, two fixed-point ALUs, and two floating-/fixed-point multipliers. The C6711 can produce two MACs per cycle for a total of 300 MMACS.In this thesis, a general-purpose array processors platform is designed using 9 TMS320C6711 DSP. This platform was accomplished with 10-layer PCB. Each Processor can communicate with its adjacent processors through share memories. The host PC can access each DSP using DSP's Host Port Interface (HPI). When transplant parallelized Hybrid Phase-shift and Time-delay beam forming algorithm to his platform, the number of processor and the size of hardware is scalable.