Study On Time Synchronous System Of DMB-TH SFN Based On GPS

With the development of science&technology and national economy,the demands for high-precision and high-stability time synchronism system are increasing,and its application in basic industry, just like communications,power and transportation, is more highlighted. The time transfer and terminal receiving equipment used presently can't meet the requirements of the application. The time transfer used presently includes two-way satellite time transfer,GPS common-view, long-wavelength transfer and short-wavelength transfer,and so on. These time transfer all can provide high-precision timing services, but the problem is that the price of the receiver is too expensive.Firstly,the related concepts of time synchronization and the synchronization for DMB-TH single frequency networks are introduced. The technologies of time interval counter and timing synchronious transfer used presently are discussed. The GPS system and principle of timing are described,furthermore the systematic error for GPS timing system is analyzed. The mathematic model of crystal oscillators is analyzed, according to the characteristics of crystal oscillators,a polynomial fitting method for prediction of aging rate based on least squares method is proposed. On this basis,a scheme using the GPS 1PPS to adjust the frequency of crystal oscillators is presented. For the purpose of frequency calibration,the technology of Kalman filter and PID control algorithm is utilized to realize the high-precision compensation for frequency deviation of crystal oscillators. Under the condition of invalidation of the GPS lPPS,the polynomial fitting is used to predicate the change trend of crystal oscillators frequency and the frequency deviation can be compensated. Based on the stability interaid between high precision oscillator and GPS lPPS,a syncronious system with good short and long term is developed. The phase detection and frequency division module are implemented in FPGA/CPLD. The algorithm is implemented in the single chip controller with the capability of in-system programmability (ISP) to facilitate the debugging and later upgrade.