| LEDs (Light Emitting Diode) have a high potential to replace the conventional light bulb as the long-life, energy efficient, environmentally friendly and multi-use light source in the future. The thermal dissipation and luminescence efficiency of high-power LEDs can be improved by the flip-chip (FC) technology. Therefore, the FC packaging also attracts great research interests for the high brightness LEDs (HB-LED).Solder bumping is a critical step in FC technology, and the capability of the bumps has an important impact on the packaging reliability. In this paper, the bumping material is the Au-30Sn(at.%) eutectic alloy. Au-Sn solder bumps can be prepared by sequential electroplating of Au and Sn layers on Si chip from the individual self-made solutions. This paper focused on the parameter optimizations for electroplating Au and Sn layers, and the Au/Sn/Au triple-layer films for Au-Sn bumps were fabricated. After that the interfacial reactions between Au/Sn (Sn/Au) couples and the phase transformations during reflow have also been investigated. The results can be summarized as follows:1. The optimized solution compositions and electroplating parameters of Au and Sn were determined as follows. Au plating:Chief salt Na3Au(SO3)20.01-0.1mol/L, complexant A 0.1-0.5mol/L, complexant B 0.01-0.1mol/L, pH buffer 0.01-0.2mol/L, Grain Refiner 0.01-0.1g/L, T=60-70℃, Peak Current Density Jk=4.0A/dm2, pH=8.0, mechanical agitation; Sn plating:Chief salt SnSO4 0.1-1mol/L, Complexant 0.1-2mol/L, Antioxidant 1-5g/L, Reducing Agent 1-15g/L, Grain Refiner 0.1-1g/L, T=45℃, Peak Current Density Jk=2.5-4.0A/dm2, pH=8.0-9.0, mechanical agitation.2. In the Na3Au(SO3)2 based electroplating system, the quality of the deposited Au layers were much better than those in the NaAuCl4 system, and the deposition rate was up to 55μm/h.3. The ultrasonic agitation was attempted to electroplate Au in this paper. It seemed that the ultrasonic agitation was able to prevent the formation of hydric (H2), which could improve the quality of the Au layers electroplated at a higher peak current density. However, the frequency of the ultrasonic may be too high to form even films at a lower peak current density. The exactly reason will need a further investigation. 4. After the Au/Sn (2μm/6μm) films were sequentially electroplated on the Si chip, the reaction between Au and Sn could immediately take place. AuSn and AuSn4 were sequentially formed in the reaction region from the Au side to the Sn side.The Au/Sn/Au (6μm/6μm/1μm) films were aged at 100℃and 150℃, respectively. The interfacial reaction rate at 150℃was much faster than that at 100℃. The Sn was firstly consumed, and AuSn4 was gradually transformed into AuSn and AuSn2.The electroplating sequence had an important effect on the formation of the intermetallic compounds. After the Au/Sn/Au (6μm/6μm/6μm) films had been aged at 150℃, a surface oxidation of the Sn was detected near the top Au side. The Sn oxide film significantly retarded the diffusion of the Au atoms into Sn layer, therefore, the Kirkendall voids were left behind at the Sn side and an unexpected reaction layer was formed at the Sn/Au interface.The Au/Sn/Au (8μm/6μm/1μm) films were aged at room temperature for 100h and then reflowed at 280℃and 310℃for 10s and 60s, respectively. The voids formed preferentially along the phase interfaces were remarkably decreased at a higher reflowing temperature. The grain size of the Au5Sn or AuSn phases were refined with the prolonging reflowing time, which can form a typical Au-30Sn(at.%) eutectic microstructure.
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