Prepration And Polishing Performance Of Nano Ceria And Cerium-titanium Oxide Composites

As the best technique for the planarization processing of ultra large scale integration circuits (ULSI), chemical mechanical polishing (CMP) has became an indispensable technique in the manufacture of various devices with ultra-smooth surface. In order to meet the demand of next generation ULSI, it is necessary to develop new CMP techniques and the relating materials. SiO2 gel particles are currently employed in silicon wafers polishing. It is suggested that ceria or ceria based composites show great performance for replacing silica as abrasive particles in polishing slurries for silicon. In this study, nanoparticles of CeO2, Ti doping Ceria and Ti coating Ceria were prepared and their performance for polishing silicon wafer were comparatively examined with respective to their physical and chemical characteristics.Firstly, Ceria nanoparticles were prepared by direct precipitation using cerium nitrate as raw material, sodium dodecyl benzene sulfonate as dispersion agent, hydrogen peroxide as oxidizing agent, and ammonium hydroxide as precipitant. XRD,TEM and so on were used to characterize Ceria.The effects of process parameters, including slurry pH, ceria content, and hydrogen peroxide concentration, on the material removal rate (MRR) in the CMP of n-type Si(111) were investigated. A maximum MRR value of 61.1nm/min was obtained using 0.5%(w/v) ceria slurry with 1.5%(v/v) hydrogen peroxide and adjusting pH 10.5, in flow rate 2000 ml/min, rotational speed 128 r/min, pressure of 6.60MPa.Correspondingly, the surface roughness Ra of polished n-type Si (111) wafer is 0.148nm.Secondly, TiO2@CeO2 core-shell composite powders were prepared by gel hydrolysis precipitation method using CeO2 as crystal seeds, Ti (SO4) 2 as raw material of Ti, CTAB as surfactant. The optimum synthesis conditions and polishing techonology were determined. The MRR value of polishing silicon using slurry containing TiO2@CeO2 core-shell composite powder coated with 10% TiO2 (synthesized under the existing of inhibitor and calcinations temperature at 800℃for 2h) and 1.5%(v/v) hydrogen peroxide was determined to be 65.4 nm/min, which is lower than that polished with ceria doped with 10% TiO2. Correspondingly, the surface roughness Ra of polished n-type Si (111) wafer is 0.144nm, which is less than that polished using pure CeO2.