Fabrication And Photoelectric Properties Of High-performance Phosphorus-doped Cds Nanoribbon Field-effect Transistors

CdS is the most promising material for detecting visible radiation due to its primary band gap of 2.4eV at room temperature, which nanostructures have also attracted much attention owing to the unique optical and electrical properties. Due to the fast development of nano- technology,study on fabrication and properties of CdS nanomaterials become more and more popular. In addition, great progress has been achieved in nanodevices based on CdS nanomaterials, such as photoelectric diodes, sensors, field effect transistor (FET) and logic circuits.Doping is one of methods to improve the properties of materials and devices based on CdS nonmaterials. Recently, doping-effect of some dopants, such as In,Mn,Fe,Hg and Cl and so on, has been reported. But doping to materials to improve the devices performance is limited by materials themselves. For further improvement of the device performance, we must redesign the configuration of the devices. Herein, top-gate configuration and high-κdielectric material (HfO2) were used for further performance improvement.In this dissertation, the electrical and optoelectronic performances of phosphorus-doped CdS nanoribbons have been studied systematically. First, P-doped CdS nanoribbons were synthesized by co-thermal evaporation. Then back-gate FETs based on P-doped CdS nanoribbons were fabricated and the performances have been studied. Subsequently, top-gate configuration and high-κdielectric material (HfO2) were used for fabrication high-performance nano-FET. Focuses on the methods to improve the performances of FET, it's useful for other fabrication of nano-FETs and helpful for its commerce application. The results are following:1. The intrinsical and doped CdS nanoribbons were synthesized by co-thermal evaporation, using CdS and phosphorus powder as source material and dopant material. Experimental parameters such as: temperature, pressure, flow rate and time were studied well. CdS NRs have a uniform width of 0.5-1μm, a thickness of ~30μm, a typical length of 30-60μm. Moreover, the CdS NRs are hexagonal single crystals grown along the [001] orientation. In additional, the diverse morphologies of material can be obtained by different condition.2. Back-gate FETs based on an individual CdS nanoribbon was fabricated by photolithography and mask template. The Si wafer covered with 300nm thick SiO2 was used as substrate. Si and SiO2 were served as gate electrode and gate dielectric material, Indium was used for fabricating the source and drain electrodes.3. The electrical and optoelectronic performances of back-gate CdS:P NR FETs have been studied systematically. It shows that the device exhibits the electrical characteristics of an n-channel FET, i.e., when VG increases (or decrease), the conductance of the NR increase (or decrease). A transconductance (gm) of 7.2nS, electron mobility (μn) of 14.8 cm2/Vs, threshold voltage (Vth) of -14.3V and subthreshold swing (S) of 25V/dec were obtained. From the measurements, P-doped CdS NR has a high sensitivity to visible light; the current of CdS NR FET measured in light is 10 times of it measured in dark, the current is increased obviously in light wavelength of less than 517 nm.4. Annealing was used for improving the back-gate CdS:P NR FET performance at 300℃. The contact barrier was eliminated and the P acceptor was activated by annealing. So the current was enhanced by 10 times. A transconductance (gm) of 70 nS and electron mobility (μn) of 140 cm2/Vs were obtained.5. High-κdielectric material (HfO2) and top-gate configuration were used to fabricate the top-gate CdS:P NR FET. A transconductance (gm) of 0.87μS, electron mobility (μn) of 27.4 cm2/Vs, Ion/Ioff ratio of 107, threshold voltage (Vth) of -1.45V and subthreshold swing (S) of 200mV/dec were obtained. In additional, a high ILight/IDark ratio of 106 can be obtained by applying an appropriate gate voltage. Response speed of back-gate and top-gate FET were studied well, which shows that the response time of back-gate FET is more than 30s, the top-gate FET has a fast response speed with response time of less than 5s.