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Optimization And Analysis Of The Noc To Reduce Squashes In Thread Level Speculation

Posted on:2012-01-19Degree:MasterType:Thesis
Country:ChinaCandidate:W B DaiFull Text:PDF
GTID:2178330338492021Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
Thread Level Speculation (TLS) is a technique aims at simplifying parallel pro-gramming. It creates multiple threads without knowing they are independent, and thenspeculativelyexecutestheminparallel,hopingnottoviolatetheinter-threaddatadepen-dency. In case of violation happens, the offending thread will be squashed and restartedto guarantee the correctness of execution. However, squashing incurs considerable per-formance overhead, and frequent squashing significantly cripples TLS performance.To reduce the occurrence of squashing and improve TLS performance, we proposea priority-based Network-on-Chip (NoC), which is deployed in the Chip Multiproces-sor (CMP) supporting TLS. By preferentially transferring messages from predecessorthreads, the priority-based NoC guides TLS threads to perform data accessing conform-ing with the sequential semantic, and therefore brings down the count of dependencyviolation and squashing.The focus and main contributions of this paper are as follows. First, by analyzingthe TLS squashing behavior, we draw the conclusion that predecessor threads are on thecritical executing path of the TLS model, and their memory access latency impose sig-nificantimpactontheTLSperformance. Therefore,theyshouldbegivenhigherpriorityin the NoC. Second, we propose a priority-based NoC, and also explore its hardwarecomplexity. Such priority-based NoC design is transparent to system level software,and its hardware overhead is also acceptable. Thirdly, we quantitatively evaluate andanalyze the performance of priority-based NoC using selected benchmarks. Upon theanalysis, we verify its effectiveness and scalability, and also gain further insights aboutthe TLS technique and priority-based NoC.The upper-level application and NoC co-designing proposed in this paper bearsthe characteristics of simple, effective and scalable. Also, we managed to improve TLSperformance by utilizing a newly emerging NoC approach, which extends the designspace of TLS and expedites its application.
Keywords/Search Tags:Chip Multiprocesssor, Network-on-Chip, parallel programming, ThreadLevel Speculation, squash, priority
PDF Full Text Request
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