The Design And Implement Of Program Control Unit And Pipeline Protection Module In FT-C55LP

Digital signal processor (DSP) is a kind of high performance CPU, which processes signal and image real-time. It is widely applied to communications, domestic appliance, aviation and spaceflight, commercial measure, biomedical engineering and military affairs.From the application DSP can be divided into three kinds, which include high performance DSP that suits in high density computation,low power DSP that suits in portable application and the class of control DSP that suits in control application.FT-C55LP is a 16-bit fixed-point and low power DSP,which is located in portable application.From the highly parallel architecture of FT-C55LP, this paper designs and implements the program control unit. Program control unit includes a instruction buffer queue (IBQ) with the capacity for 64-byte,which can receive 32-bit data from the program read bus (PB) and emit 56-bit instruction code per cycle.A Pre-decoding module is used to calculate the length of single-instruction,parallel instruction and extending instruction, and to determine whether two adjacent instructions are parallel.A program control module, through the modification to local read and write pointers of IBQ, efficiently implements various control instructions. These control instructions can make full use of the buffer function of IBQ to maintain continuous program flow,and speculatively prefetch the target of conditional instructions to reduce the overhead caused by branch instructions.They also can cache the entire loop code at IBQ to avoid redundant memory access and efficiently implement the local block repeat instruction. The results of functional verification show that each module achieves the desired goals.This paper also designs a pipeline protection module to specifically deal with the conflict in the hardware circuit, which is used to insert stalls between two possibly conflictory instructions, and automatically avoid pipeline conflict to ensure the program performing correctly. Replacing the software scheduling method of general DSP,FT-C55LP uses a dedicated logic to deal with pipeline conflict. This paper deeply analysises the general data related type of pipeline.Combining with the character of complex register access in this design, it developes the strategy which inserts stalls behind related instruction and stops the flowing instructions until the conflict disappears. The design is finished at the basis of all the various conflicts summarized.Functional verification of this module is also passed.