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FPGA-Based Implementation Of GPS P-code Acquisition And Its Testing

Posted on:2009-12-04Degree:MasterType:Thesis
Country:ChinaCandidate:Z B WangFull Text:PDF
GTID:2180360302469303Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
The main issues for applying a GPS (Global Positioning System) receiver in high dynamic vehicles are fast signal acquisition and accurate signal tracking. This paper focuses on fast-acquisition scheme of GPS P-code in high dynamic environment and its implementation. An algorithm for fast signal acquisition applying to high dynamic P-code signal is presented. The major works are as following:1. Based on the study of the conventional fast-acquisition algorithms, a scheme based on PMF-FFT for direct GPS P-code signal acquisition is presented and simulated under Matlab. The simulation results indicate that this scheme can be used in P-code acquisition;2. The direct GPS P-code signal acquisition is implemented by using FPGA. Some techniques, such as parallel process and pipeline architecture are adopted to satisfy acquisition time limitation.3. A scheme for testing the FPGA-based P-code acquisition model is designed on base-band process circuit of the receiver. The principle of generating test signals and quantization threshold are discussed;4. The signal to noise ratio (SNR) losses of the acquisition model are tested, and the results show that the fixed-point calculation of FFT leads to 80% loss of the total SNR loss due to FPGA-based implementation.
Keywords/Search Tags:GPS, P-code, fast-acquisition, FPGA, DSP
PDF Full Text Request
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