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Filling Algorithm And Hardware Based On Dsp And Fpga Attitude Indicator

Posted on:2005-10-13Degree:MasterType:Thesis
Country:ChinaCandidate:L M LiFull Text:PDF
GTID:2192360122475672Subject:Measuring and Testing Technology and Instruments
Abstract/Summary:PDF Full Text Request
Filling the sky and ground region within the attitude indicator of an aircraft electronic flight instrument system (EFIS) is a highly time-consuming job. How to accelerate the picture generation process without undermining the filling quality has been a focus as well as a difficulty of the research.This paper deals with attitude indicator's filling algorithms as well as hardware structure, with the purpose of fully accelerating the picture generation process. For the filling algorithms, this paper has presented a scanning seeds filling algorithm and a mathematical morphology seeds filling algorithm. The software implementation of the two algorithms is based on a DSP platform and as for the hardware implementation, a DSP + FPGA scheme, specifically designed against the mathematical morphology seeds filling algorithm, has been presented. It has greatly accelerated the graphical display speed and hence, well solves the real-time filling issue.
Keywords/Search Tags:attitude indicator, filling algorithm, mathematical morphology, dilate, FPGA
PDF Full Text Request
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