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Study On Phase-Locked Loop Steady Speed Control Technique Of Flywheel Based On FPGA

Posted on:2012-03-18Degree:MasterType:Thesis
Country:ChinaCandidate:C C SongFull Text:PDF
GTID:2212330362450515Subject:Control Science and Engineering
Abstract/Summary:PDF Full Text Request
For high steady state accuracy requirement of flywheel speed control system, phase-locked loop(PLL) control scheme is widely used at present. There are three realization methods, such as PLL ASIC, software PLL based on DSP and digital PLL based on FPGA. Using FPGA realizes the PLL control circuit is not only computing fast, but also can be parallel processing, which can overcome the big computation, too long computing time and other shortcomings, so this paper determined the phase lock loop control scheme based on FPGA .First, In order to validate the performance of phase-locked loop motor control system, this paper introduces the work principle of phase-locked loop, and establishes frequency and phase detector, loop filter and voltage-controlled oscillator model respectively. On the basis, the flywheel motor phase-locked loop control system model is built. Then according to the stability theory, we give the minimum speed limit of phase-locked loop control system. Simulation results show that the phase locked loop control scheme can meet the performance of control system.Second, according to the results of the simulation model, we use FPGA to realize a phase and frequency detector with 10 states, IIR loop filter, PWM pulse width modulation and commutation logic. Then conduct simulation and analysis the waveform. Aim at phase locked loop flywheel steady speed control system realization of hardware, the H bridge inverter drive circuit, the current limit protection and pump up bleeder circuit is completed. On the basis, phase lock loop flywheel steady speed control system platform is constructed.Finally, using the phase-locked loop control system as experimental platform, the fly-wheel steady speed control experiment is carried out, and the logic functions of phase-frequency detector, loop filter, and PWM module is validated, and the performance of the system in the set speed is tested.
Keywords/Search Tags:FPGA, Phase-Locked Loop, Phase-Frequency Detector, PWM, Commutation Logic
PDF Full Text Request
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