Process Level Simulation Of Digital Substation Training And Simulation System

Digital substation is constructed at a fast speed in our country. The substation staffs usually are overwhelmed facing the different operation mode, communication system and configuration method as well as previous substation. And with the rapid expansion of the scale of power grid and increasingly complex of electric power load, the demand to the substation stuff and equipment is higher and higher. Therefore, digital substation training and simulation system gets higher attention form power training department.The digital substation training and simulation system mentioned in this article based on digital-physical mixed type substation training and simulation system. Traditional primary system simulation module and the real bay layer intelligent electrical devices are used. In order to solve the problem that the two parts can’t be connected directly, process level devices used in digital substation training and simulation system are designed to simulate the process network.Altera’s FPGA chip EP3C80F484C8 is used as microprocessor of the devices, W5100 as the 100M Ethernet controller. The indirect bus access technology is put forward between microprocessor and its peripherals. QuartusⅡis use for the software platform, and the verilog hardware description language is used as programming language. The process level devices are designed for the data exchange between the primary system simulation module and the bay level devices on the analysis of the IEC61850 standard of process network interface. The result from the network tester shows that the Ethernet module as well as the microprocessor can satisfy the time demand of the digital substation process level. The dynamic configuration of the information model and modification of parameters is realized in the devices.The configuration file is programmed in substation description language and downloaded into the devices to set up the information model. The parameter of the information model can be operated by MMS. In order to ensure the generalization and portability of the devices, embedded system is developed in the SCL parser. The NOIS core is used as the CPU, the SOPC Builder as the software development platform, C++ as the programming language. SCL and MMS parser as well as the storage are designed by IP core and the macro module technology.The interface conversion between the primary system simulation module and the bay level devices can be solve the by the simulation-used process level devices. And a foundation for the development of digital substation training and simulation system is solidly built by the simulation of the process level.