The Sign Digit Adder And The Circuit Reliability Research Based On Implication

As the digital system is widely used and its complexity increased dramatically,the reliability of the system causes the attention of people gradually. With the lapse oftime, the chip is prone to failure under some special environments and conditions. Animportant measure to improve the reliability of a system is making the circuit to havethe on-line error detection capability, thus providing the basis for off-line repair oron-line correction. This paper is interested in the reliability of the digital circuitunder working.The paper focuses on how to improve the reliability of the circuit, including thefault-tolerance structure of radix2signed digital adders and an on-line error detectionapproach exploiting the logic implications. The main works are as follows:The paper first presents a fault-tolerance structure of radix2signed digital addersbased on the existing error detection research, providing error detection, errorlocalization and full error correction ability. The adder can diagnose the fault, anddifferent recovery measures are applied to error correction according to the diagnosisresult. As the operation number is increased, the experimental results show that, theincreasing area and delay of the proposed fault-tolerant structure compared tonon-redundant signed digital adder are stable at120%and56%respectively. Second,a new implications selection approach is proposed. The implication relation selectionis based on fault detection rate and implication value. According to the selectedimplication, a checking logic can be built for combinational circuit on-line errordetection.