The Design Of Parallel Programming Simplification Based On CUDA

CUDA performs general purpose parallel computing using GPGPU, which has been applied to various computing fields. A simplification design is proposed to support the parallel programming outside the GPGPU device. Firstly, a solution for parallel programming among GPGPU devices is proposed to enable the independent usage of Encapsulated Multiple Addressing technique in cluster computing environment. The solution is suitable for dealing with problems which are composed of a large quantity of tasks. Besides, the utilization of data multiplexing technique in this solution makes it suitable for executing video processing tasks. Then, Encapsulated Multiple Addressing technique is introduced to simplify CUDA parallel programming among CPU and GPGPU devices. This technique aims at removing the coupling between multi-address-space architecture and memory management.Moreover, a source code converting technique is proposed based on Encapsulated Multiple Addressing technique to further simplify memory management in CUDA programming, which allows programmers to use memory related variables without memory maintaining operations. In the experiments, the performance of Encapsulated Multiple Addressing technique and NVIDIA Unified Virtual Addressing technique are compared. The experimental results reveal that, when executing with data on other devices. Encapsulated Multiple Addressing technique has a higher performance in memory-intensive tasks while Unified Virtual Addressing technique is good at compute-intensive tasks. In addition, three typical algorithms form NPP library are chosen to verify the conclusion drawn from the previous experiment, and to measure the overhead of Encapsulated Multiple Addressing technique, which is between0.04%and0.07%.