High Reliability Onboard Multiprocessor Computer Design

The development of space technology reflects the level of national technology and comprehensive national power, and has significant influence on national economic, national defense and military construction. With the continuous development of space exploration, the space mission puts forward higher requirements for on-board computer. The performance, reliability and life-span of on-board electronic devices are challenged by the severe condition in space environment, therefore, higher performance and higher reliability of on-board computer is required to be developed for future space mission.Having the spacecraft high-level electronic system technology research project as the background, this paper will focus on On-Board Fault Tolerance Computer architecture with compliance to high-level electronic system specification, and provides the computer architecture with multiple microprocessors working in redundancy. The Switch System based on High Speed Serial Data Bus is researched; the intercross link between processor and interface circuit, and data interchange within multiple processors are designed; the realization technology of serial transmitted clock synchronization system is developed. According to the mission requirements, the system reconfiguration strategy during the faulty of sub computation unit or data transmission route is provided. The circuit design of on-board fault-tolerance computer is introduced based on the completion of architecture design and Switch System research.The serial transmission delay of re-configurable inerter link is analyzed and calculated; also the phase calibration test and signal electric characteristic test of clock synchronization system are accomplished, and the correctness of design method and circuit realization is validated.