Design Of A Safety-Critical Computer Platform For CBTC System

In recent years, Communication Based Train Control System (CBTC) has been widely used with the rapid development of railway industry. The safety-critical computer system is the key device to guarantee the safety and reliability operation of CBTC. A new type of common safety-critical computer platform is designed in this paper by using the System on a Programmable Chip (SOPC) technology based on the CBTC’s requirements. The prototype has been completed with testing.Firstly, the rudimentary background knowledge associated with afety-critical computer and SOPC technology is provided. And the research status in domestic and foreign is surveyed. Then the three kinds of redundant safety structures are compared in the paper which are commonly used in the railway industry -- "hot standby", "two out of three" and "double two out of two". The multiple advantages by appling the multi-core SOPC technology to build the double two out of two safety-critical computer system is analyzed.And on the basis of above analysis, the detailed process to construct dual Nios II soft core in Altera’s FPGA chip are described in this paper. Concrete solutions are given to solve the key problems such as system components, internal connection, communication modes, memory configuration, and address assignment in the dual-core architecture. Dual-core run independently and synchronously in just one chip is implemented. A hardware two out of two bus data comparator to connect with the dual-core is also designed in the paper. In order to ensure the safety and reliability of the comparator, the comparator itself is designed as a two out of two structure. The dual channels processes complete data CRC checksum, data comparison and secure dynamic signals outputing synchronously. The output will be guided to the safe side unless the dual channels data comparison is passed.Meanwhile, the necessary peripheral modules and multiple interface circuits include UART bus, CAN bus, double loop Ethernet and local bus are also designd in the paper according to the operation requirements of CBTC system. Combining with the two out of two CPU structure, the complete safety-critical computer system is built. The composition and design of each hardware module has been proposed in the paper with specific schematics. On the basis of the hardware platform, the software structure of safety-critical computer system is analyzed and the key functions of platform layer software such as initialization, state synchronization, task scheduling and master-standby switching has been realized in this paper.In order to demonstrate the safety and reliability of safety-critical computer platform, the modeling analysis is conducted in this paper by Markov model and Reliability Block Diagrams based on the needs of RAM. It proves that this design has unique advantages in terms of reliability by comparing with the conventional multi-CPU two out of two architecture. Finally, the design achievements are verified by simulating and testing the main functions in the safety-critical computer platform prototype.The main innovations in the research work lies in the combination of SOPC multi-core technology and safety redundancy structure. Two out of two processor architecture is integrated in one single FPGA chip. On this basis, the design, simulation and testing are completed for the new type of double two out of two safety-critical computer platform prototype in this paper.