Design And Implemention Of Short And Open Test Circuit For TSV In Three-Dimensional Integrated Circuit

Three-dimension integrated circuits using Though Silicon Vias(TSV) take full use of the vertical dimension which has been ignored till now. As the length and power of interconnection have been reduced and the density of integrated circuits has been improved, the method that TSVs are used to connect Multi-Dies as vertical links becomes an inexorable trend. The reliability of TSVs has a great influence on the yield of chips when TSVs are used to be signal passes. However, the process of TSV is not perfect now, there are problems generated by making TSV, bonding die, transporting chip and using chip. For this case, this article presents a self-test circuit of TSV for post-bonding in which short circuits and open circuits are researched. Main works are as follow.1. Establish the malfunction model of TSV to support the study of designing and analyzing the circuit for TSV testing. According to the fabrication process of TSV, the defect of TSV is reserched. Different problems make different defect models. Moreover,the electric model of the whole TSV(lower die metalâ†'bumpâ†'TSVâ†'upper die metal)is made to improve researches reality when study the test circuit of TSV.2. To detect the short circuit problem of TSV, two kinds of work have been done.One improved project is raised to make up the defect of Leakage Test Threshold(LTT) in L2 VCC which decreases LTT from 100μA to 17μA. On the other hand, to satisfy the demand of test threshold of low drain current and accuracy of high drain current, a way for test TSV short circuit(CAF-SAM) based on testing the width of pulse is put forward.In this way, the range of LTT is from 0.1μA to 20μA. While LTT is 1μA, the resolution of drain current test is 22.5nA,meanwhile, the area of usual study has been reduced19.25%.3. To support tests of TSV open circuit, a level is made according to the standard of degrading signal of TSV. Firstly, when the resistance of open circuit is 0K?~33K?,there will be an improvement of 14% on path delay according to the result of SPICE simulation. Secondly, analyzing the degrading signals of TSV through the resistance of open circuit, in consideration of path delays. There are three levels in this paper which are recovered, not recovered and no recovering. The level of recovering is a strategy like that recover signal making the path delay of TSV to the range of limitation, in spite of using redundant TSV which save the source of redundancy.4. To detect the open circuit problem of TSV, the circuit for testing problem based on comparing voltage is achieved and optimized. There is a layout of recovering circuit and TIQ comparators which all digital circuits are used instead of comparators of test open circuit. The accuracy of test circuit is improved by changing the width of import pulses, and a 12.82% of area is reduced.5. The test circuits of short circuit and open circuit raised above are achieved and a layout of this model is given. There has been set a TSV self-test flow. Moreover the results are correct which depend on SPICE simulation with multi inputs and vary conditions of PVT, and can be used in project.