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Research On Neutral-point Voltage Balancing Control And Dead-time Compensation In Three-level Inverter

Posted on:2018-09-01Degree:MasterType:Thesis
Country:ChinaCandidate:G LiuFull Text:PDF
GTID:2322330533969594Subject:Vehicle Engineering
Abstract/Summary:PDF Full Text Request
High power density and high efficiency motor drive systems in electric vehicles(EV)require inverters having high switching frequency,high voltage rating,low output harmonics and low electromagnetic interference(EMI),at the same time,inverters must have high efficiency and low heat to reduce the possibility of derating run.Two-level inverters that are currently implemented in electric vehicles cannot satisfy these requirements at the same time,while three-level inverters have the advantage of high power density and high efficiency,making them promising to be implemented in future electric vehicles,but before that,the neutral-point unbalance problem has to be overcome.Furthermore,inverter nonlinearity caused by dead-time insertion needs to be compensated in high performance motor control algorithms.This paper concentrates on the study of the two aforementioned subjects and is expected to provide useful references for future design of high power density and high efficiency EV drive system.The role of DC-link resistor in three-level inverters is analyzed and a design method of DC-link resistance is proposed.The influence of neutral-point voltage unbalance as also as the noise differences between NTVPWM and NTV2 PWM are analyzed.To compensate dead time,voltage errors caused by dead-time insertion are derived,and considering the parasitic capacitance of switching components,the relationship between compensation time and phase current are deduced.An optimized NTV2 PWM with reduced switching noise is designed.Through common mode voltage injection and elimination,the number of switches in a switching cycle is reduced,thus shortening the switching cycle and raising the current harmonic frequency without increasing switching loss.Switching noise is lowered because of the increased harmonic frequency.In the proposed method,closed-loop control of neutral-point voltage is required to keep its balance.To compensate dead time,a novel current-detection-independent dead-time compensation technique based on PWM-triggered terminal voltage sampling is proposed to realize accurate compensation in the current-crossing region.Simulation results indicate that the optimized NTV2 PWM can shorten switching period by about 1/4 and can increase the frequency of harmonics by roughly 1/3 compared with NTV2 PWM.The proposed method is effective in lowering switching noise without sacrificing harmonic performance.Experimental results also prove that the proposed method is effective in lowering switching noise without sacrificing harmonic performance.Compared with existing compensation methods,accuracy of the proposed dead-time compensation technique in current zero-crossing region is proved be high in experiments.The feedback of phase current and neutral-point voltage are required in the optimized NTV2 PWM.It is suitable for three-level inverter-fed induction motor drives where high acoustic noise performance is expected.The proposed dead-time compensation technique overcomes the weak current detection problem in dead-time compensation,and it only requires six resistors for voltage division,making it suitable for both the open-loop motor drives where current sensors are unavailable and the closed-loop motor drives.
Keywords/Search Tags:three-level inverter, neutral-point voltage balancing control, PWM strategies, dead-time compensation, current polarity detection
PDF Full Text Request
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