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Design Of The NAND Flash Controller System Based On FPGA

Posted on:2016-09-09Degree:MasterType:Thesis
Country:ChinaCandidate:W J LiuFull Text:PDF
GTID:2348330488974205Subject:Integrated circuit system design
Abstract/Summary:PDF Full Text Request
With the development of information technology, nowadays society has much higher demand of data storage. As a type of non-volatile memory, NAND Flash, because of its large capacity, low cost, long service life, is widely used in data storage solutions. FPGA has abundant logic resources and is able to process the modules in parallel, this advantage can be fully used in the field of large-scale image processing. Design of NAND Flash controller integrated in the system of FPGA has a good application prospect.This paper discussing a storage solution applied to large-scale image processing system, analyzing the work mechanism of the NAND Flash memory and discussing the composition structure and general interface of common NAND Flash on the market. By means of analyzing the access mode and the temporal specification of the NAND Flash, a NAND Flash controller solution is presented. This solution divides the controller into modules with top-down design method, and operates the NAND Flash through the interworking of every individual module.This controller completes the operations of reading, erasing, programming, etc of NAND Flash, as well as the error detection and error correction mechanism of each operation. It uses VHDL hardware description language to write the RTL code, completes the design of module of command control, sequential control, data-caching, the generation of internal address, as well as the generating and verifying of the ECC. As to the inevitable problem of invalid block in NAND Flash, this paper analyzes the generating reasons in detail, designs the invalid block detection method suitable for this subject. By establishing the invalid block information table in FPGA, the invalid block's address will be shielded in the operations, in order to improve the reliability of the storage system.This paper presents the validation protocols of the NAND Flash controller, sets up the simulation platform, adds the appropriate test vectors, verifies the function of the controller by using the simulation software---Model Sim. Complete the synthesis and implementation of NAND Flash controller, based on Xilinx FPGA. This controller has much engineering practical value, because of meeting the design requirements on function and timing.
Keywords/Search Tags:Image Storage, NAND Flash, FPGA, ECC, Invalid Block Processing
PDF Full Text Request
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