Algorithm Research And Circuit Design Of Wearable Blood Pressure Detection Chip Based On Pulse Transit Time

Blood pressure(BP)is the pressure of circulating blood on the walls of blood vessels.It is a core parameter reflecting the cardiovascular function of the human body.The number of people with high blood pressure is increasing year by year,so regular blood pressure detection is essential.Existing home electronic sphygmomanometers are limited in portability,real-time and comfort because the measurement location is relatively fixed,and it is not possible to monitor people's blood pressure changes in real-time,and it is necessary to use a cuff.Therefore,the research on wearable blood pressure detection device is very meaningful.The blood pressure detection method based on the pulse wave is very suitable for wearable devices because it breaks through the limitation of the cuff,but it is susceptible to interference and limited in accuracy,so it is still in a stage of exploration and perfection,and has not yet entered the commercial field.This paper focusses on wearable blood pressure detection chip based on the pulse wave method.Firstly,the advantages and disadvantages of various anti-interference methods of Photoplethysmograph(PPG)signals are analysed,and then the anti-interference preprocessing algorithm of PPG signals is proposed.The anti-interference preprocessing algorithm uses low-pass filtering algorithm to remove high-frequency noise,uses weighted mean filtering algorithm to remove the baseline drift,and uses autocorrelation as well as periodic moving average filtering algorithm to remove motion artifacts.This paper also proposes a multi-position pulse transit time(PTT)extraction algorithm based on single accelerated PPG(APG)signal.The algorithm in this paper is simulated by MATLAB platform.The simulation results show that the proposed algorithm has a good processing effect.Then,this paper builds the system architecture of the blood pressure detection chip,designs the hardware circuit according to the proposed algorithm,uses Modelsim to ensure the function of the circuit,and also uses the FPGA to verify the actual circuit.The verification result shows that The systolic blood pressure(SBP)error measured by the circuit in this paper is 1.16±2.09mmHg(mean absolute error±standard deviation),and the diastolic blood pressure(DBP)error is 0.81±1.05mmHg.Finally,based on the SMIC 180nm process,the design of the blood pressure detection chip is implemented in the entire ASIC process.The total area of the entire blood pressure detection chip is 6279715?m~2,which occupies 715229 equivalent logic gates.The highest supported clock frequency is 60.6MHz.The dynamic power consumption of the chip under the 8MHz system clock is 15.5919mW,which satisfies the application requirements of wearable devices.