System Architecture And Validation Of Photonic Analog-to-digital Converter Based On Actively Mode-locked Laser And Wavelength Division Multiplexing

Analog-to-digital converter(ADC)has been playing an important role in radar,communication system and many other fields.ADC with high sampling rate and high resolution is needed to satisfy the increasing demand.In recent years,electronic ADC(EADC)has been developing rapidly and its sampling rate has been improved greatly.However,it is difficult to further improve the sampling resolution which is limited by the sampling timing jitter of EADC.Photonic ADC(PADC)overcomes the bottleneck of EADC by taking full advantage of photonics with ultra-wide band,high stability and low jitter.PADC can be realized by either actively mode-locked laser(AMLL)or passively mode-locked laser(PMLL).Optical time division multiplexing(OTDM)and wavelength division multiplexing(WDM)scheme are adopted to multiply the sampling rate of PADC.It is an effective way to achieve ADC with high sampling rate and high resolution.In this thesis,AMLL is adopted to achieve high sampling rate based on WDM scheme.Architecture of AMLL-WDM-PADC system is analyzed theoretically and demonstrated experimentally.It is the first time to apply a dual-output modulator in AMLL-WDM-PADC to reduce nonlinearity.Moreover,wide-band signal sampling in AMLL-WDM-PADC is demonstrated.The specific tasks include:(1)This thesis proposes a PADC scheme with high sampling rate and high resolution,which is called AMLL-WDM-PADC.Theory of AMLL-WDM-PADC is studied.The scheme of decreasing nonlinearity of the system is proposed.It is the first time to adopt the dual-output modulation in AMLL-WDM-PADC,which increases the spurious free dynamic range.The scheme is theoretically analyzed and simulated.(2)By implementing the ultra-high sampling rate optical sampling clock generation part,the signal sampling part,the parallel quantization part and parallel data processing part,AMLL-WDM-PADC is experimentally achieved.The sampling rate of the system is 40 GS/s.For the RF signal of frequency below 12.1 GHz,the effective number is above 6 bits.Scheme of reducing nonlinearity in AWLL-WDM-PADC is verified experimentally.The third-order distortion is suppressed by ~40 dB and the effective number of bits is improved by adopting the dual-output modulator.At the same time,the scheme of reconfigurable AMLL-WDM-PADC is explored.By making use of the AMLL with tunable repetition rate,a reconfigurable AMLL-WDM-PADC is realized.(3)Wide-banded signal sampling in AMLL-WDM-PADC is studied.Linear chirped signal is sampled and recovered by AMLL-WDM-PADC.The effect of bandwidth of modulator and photo-detector for the system is demonstrated.