The Design And Reliability Analysis Based On QCA Comparotor

The feature size of devices have been continuously decreasing with the progressing of manufacturing process technology,and the traditional circuits represented by CMOS technology are gradually approaching their limits.People urgently need to find a new device that can replace traditional CMOS devices,in which Quantum-Dot cellular automata(QCA)is an emerging nanoelectronic device that can replace traditional CMOS devices.The QCA circuits transfer binary information with Coulomb force between QCA cells while the traditional CMOS circuits transfer binary information by using current.Based on the research and summary of the design concept of the two-input comparator,this paper adopts the QCA two-dimensional improved clock scheme based on the VLSI architecture of the systolic array,and selects the special circuit interconnection method of the coplanar intersection based on the rotating cells.Then three circuit designs based on QCA-based three-input digital comparators were completed.Finally,QCADesigner software was used to simulate the three QCA circuit designs.The simulation results show that the three circuit designs have the correct logic function.The QCA two-dimensional improved clocking scheme that is adopted in this paper can effectively improve the parallel computing capability of the circuit and the data pipeline properties of processing binary information.Selecting the coplanar cross-circuit interconnection can greatly reduce the number of circuit interconnection transmission lines to,which achieves the reduction of the circuit area and the clock delay.This paper uses the mathematical model of Probability Transfer Matrix(PTM)to analyze the circuit reliability of the two-input digital comparator scheme proposed by previous researchers and the three-input digital comparator scheme presented in this paper,and obtains the final PTM analysis result.