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Research On Online Monitoring System For Reliability Problems In Digital Integrated Circuits

Posted on:2020-05-06Degree:MasterType:Thesis
Country:ChinaCandidate:H WangFull Text:PDF
GTID:2428330572496801Subject:Electrical engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of science and technology,the digital integrated circuit production process has entered the nano-scale stage,and various problems have arisen in the reliability of integrated circuits.The main factors affecting the reliability of sequential circuits are the following two types: single-event effects(soft errors)caused by high-energy particles bombarding sequential circuits and circuit aging problems caused by negative bias temperature instability.Firstly,it introduces the related background and development of integrated circuits,summarizes the impact of circuit reliability on people's production and life,and analyzes the causes of soft errors and circuit aging,and the existing sensors and checkers.The working principle and structure are analyzed.Secondly,aiming at the structure and function defects of the sensor,a new aging prediction sensor is proposed,which can predict the aging of the combination logic circuit and self-latch the prediction result,and solve the floating point problem of the sensor during the latching period.The stability of the structure is superior to other similar types of structures.Again,a new type of checker is proposed.By verifying the fault timing,the checker can detect both soft and aging faults and predict aging,and distinguish the detection results by different latches.Compared to traditional validators,the new validator is more versatile,with lower area and power consumption.Finally,the new sensor and checker in the article were simulated and analyzed by HSPICE simulation software.The simulation results show that the proposed sensor can predict the aging of the circuit and latch the prediction result.The new calibrator can simultaneously monitor the aging fault and single-event transient,and can predict the aging of the circuit.The experimental results show that the proposed sensor reduces the number of transistors by about 8% and the average power consumption by about 20% under the premise of ensuring its function.At the same time,the validator proposed in this paper can detect more than SVFD.The error does not increase the clock signal,and the power consumption is reduced by about 10%.Figure [56] table [6] reference [56]...
Keywords/Search Tags:combinatorial logic circuit, aging, soft error, sensor, negative bias temperature instability
PDF Full Text Request
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