Research On Software Error Detection Technology For Embedded System In Harsh Environment

Embedded systems are widely used in the field of aerospace due to their advantages such as simplification,high specificity and high real-time performance.With the great improvement of computer performance,chips are more susceptible to space radiation.In harsh radiation environment,the single event effect caused by high-energy particle radiation is the main reason for the failure of airborne computer systems.The transient fault caused by the single event upset is the most important manifestation of the single event effect.Providing highly reliable error detection solution that meets cost constraints has been a challenge for the design of highly reliable airborne computer systems due to different requirements for system reliability and performance overhead indicators in different scenarios.Therefore,it is significant and valuable to research software error detection technology for embedded systems in harsh environment.In this paper,software error detection technology for transient fault is studied.The main research work is as follows: 1)Aiming at the problem that the data flow error detection based on redundancy calculation has higher performance overhead,a data flow error detection method based on SVR is proposed.By analyzing the experimental results of fault injection,this paper presents the extracting method of instruction features that affect the vulnerability of instructions by combining with the program analysis and establishes the instruction SDC vulnerability prediction model.According to the SDC vulnerability prediction value of the instructions,instruction redundancy is processed to the target program selectively.The experimental results show that the proposed method can achieve higher error detection rate with lower performance overhead.2)Aiming at the problem that the control flow error detection based on signature analysis has higher high performance overhead,a control flow error detection mechanism based on the basic block repartition is designed.The basic blocks are repartitioned and classified by analyzing the control flow transfer types of various control flow graphs.By combing node type signature and predecessor-successor signature,dual signature analysis mechanism is designed to improve the describing ability of signatures.This paper realizes the control flow error detection intra block and inter procedures,and verifies that the control flow error detection mechanism can achieve a higher error detection rate through the detection efficiency analysis.3)Based on the above research,we also studied the LLVM framework and implemented each functional block.A program reinforcement system for transient fault based on LLVM is designed and initially implemented.The target program hardened by this system has the capability to detect transient faults.The experimental results for the Mibench benchmark show that the error detection mechanism designed in this paper can effectively solve the problem of transient fault detection under the ARM target platform.