Low Power Design And Verification Of Baseband Chip LTE Based On SoC

With the advent of the mobile Internet era,portable electronic devices such as smart phones are becoming more and more popular,and such portable mobile terminals have had a huge impact on people's lives.As the most important part of the smart phone baseband chip communication,the main function of LTE is to improve the network data transmission capability,and complete the data synchronization,modulation and demodulation between the user and the base station at the same time.With the development of the smart phone and the increase of the application function,the power consumption of the mobile phone is increasing,therefore,the power consumption becomes a problem that must be solved in the development of the mobile phone.As an indispensable communication processor for any mobile phone,the integration of the baseband chip is very high.And the LTE baseband chip is the next generation product of 2G and 3G baseband chip development.Its integration is higher,so the low-power design of the LTE baseband chip becomes an important aspect of the low-power problem of the baseband chip.In order to reduce the power consumption of the baseband chip,this paper carries out system-level low-power design,verification and testing for the LTE subsystem of the baseband chip.Based on the technologies of dynamic voltage frequency management and gated power supply,this paper focuses on the low-power design of the baseband level of mobile phone baseband chips,and designs different work states in the whole low-power control of LTE.The specific implementation of electricity proposes a system-level low-power method that can be applied to a mobile phone baseband chip.In the design of the different working modes of the LTE subsystem,the design and work process of deep sleep to wake-up,light sleep to wake-up,power-on to power-off are detailed and elaborated.The clock,power supply and etc.of the LTE subsystem in different states is strictly control by timing.The LTE subsystem uses the state machine to control the safe switching between the working state and the dormant state to ensure that there will be no erroneous running behavior,such as suspended animation during sleep,and data events lost when LTE subsystem are waked up.Two modes of data saving and recovery under deep sleep are designed.In the external save mode,the memory is selected to shut down for deep sleep,and the data is saved to external storage for data storage before the LTE subsystem enter deep sleep,and moved back after the LTE subsystem are waked up;in the internal mode,the memory is kept,only the memory function is maintained,and the data is not lost.After completing the design,the pre-silicon verification and post-silicon testing of LTE subsystem are carried out.In the pre-silicon verification,the different low-power design of LTE simulates the application scenario of the LTE subsystem through software,and simulates different modes of power-on,power-off,light sleep to wake-up,deep sleep to wake-up,and deep sleep data storage.With waveform analysis,the LTE subsystem design was verified at the RTL level as expected.After the silicon is used,the Trace32 and lauterbach,Matlab,PCBA board and etc are used for automatic test,and the current value in different modes of the LTE sub-system is tested under the condition of constant voltage,and compared with the test data before the silicon to ensure the correctness of the test.Then the voltage test is carried out on the chip,and the power consumption in different modes is calculated according to the relationship between current,voltage and power consumption,and the overall power consumption of the baseband chip is reduced by about 10%.