Design Of 0.6V 55nm Near-threshold Standard Cell Library

In recent years,with the increasing demand of extremely low-power applications,such as medical electronic chips,wearable devices,and the internet of things,the low-power characteristics gradually replaced the high-performance,become the chip's first design goal.Standard cell library is the basis for circuit implementation,also a bridge between the underlying circuit and the upper layer design.Researches shows that when the supply voltage is close to the threshold voltage,the circuit is the most energy efficient.However,in the near threshold voltage range,the standard cell performance deteriorates or even does not work,which limits the performance of low-power circuit system.Therefore,standard cells who can work stably in the near-threshold voltage range,is the premise of design high performance low power circuit.In order to design and implementation of high-performance low-power microprocessor chips,we have designed a standard cell library that works stably in near-threshold voltage range.In the design process of this set of near-threshold standard cells,we formed some methods of design near_threshold standard cell library.We deeply analysis the characteristics of transistor and standard cells in near-threshold voltage range,and combined with the standard cell application environment in the circuit system,we built a simulation environment for standard cell design.we also formed the cell size design method,according characteristic structure's size to determining the cell size,and use this method designed the near_threshold standard cell.The near-threshold standard cell library is the basis of near-threshold circuit implementation.This thesis has deeply studied and analyzed the near-threshold standard cell library,and based on the SMIC 55 nm CMOS process,designed a standard cell library.The standard cell library including conventional standard cell and power management standard cell,a total of 35 cell types,and 146 cell numbers,all of the standard cell can work stably at 0.6V supply voltage,a wide temperature range of-40 to 125 degree celsius,and all of the standard cell can hold up 10% VDD noise effects.Compared with the commercial standard cell library,the benchmark circuits ISCAS'85 and ISCAS'89 verification results shows,the designed standard cell library improves the combined logic circuit's performance 16.73%,the sequential logic circuit's performance 32.57%.The implementation of the microprocessor shows that the designed standard cell library is compatible with the mainstream chip design EDA tools.Compared with the power analysis results of microprocessor implemented by commercial standard cell,the power analysis results of microprocessor shows the standard cell library designed this time reduced the microprocessor's power consumption 46.76%.