Mechanism Analysis And Optimization Of Silicon Carbide VDMOS Short Circuit Reliability

Silicon carbide based vertical double-implanted metal-oxide-semiconductor field-effect transistor(VDMOSFET)has been widely used in medium and high power systems,aerospace industries due to its low on-resistance,fast switching speed and high breakdown voltage.However,as a power switch device,silicon carbide VDMOS suffers the high-power short-circuit stress when the load is short-circuit.Therefore,the short-circuit reliability of the device is challenged.At present,the short-circuit reliability of silicon carbide VDMOS has not been fully studied yet.This thesis aims to reveal the short-circuit robustness and reliability degradation mechanism of silicon carbide VDMOS and propose new structures with high-short-circuit reliability.Firstly,theoretical and simulation analysis are used to demonstrate the short-circuit reliability degradation characterization method such as I-V characteristics,CV and three-port CP test method.Secondly,the short-circuit test and simulation platform are built to study the short-circuit robustness of silicon carbide VDMOS and the effects of repetitive short-circuit stress on the static parameters such as threshold voltage,on-state resistance and gate leakage current and the dynamic parameters such as gate charge,switching characteristics of silicon carbide VDMOS.It is found that the short-circuit robustness failure of SiC VDMOS is mainly due to the increasing junction temperature of the device,which leads to the generation of gate leakage current and the failure of the device.The degradation of the electrical characteristics under repeated short-circuit stress is caused by negative charge,which is injected into the gate oxide layer under the high electric field and high temperature at the interface.Based on the research conclusions above,two high-short-circuit reliable structures are proposed.The short-circuit electronic current density on the interface of channel region is reduced to 1×10~4A/cm~3 with the trapezoidal p-type base region structure,which can improve the short-circuit reliability by 5%.At the same time,the high-k insulated gate structure can reduce the electric field intensity of the interface gate oxide layer to2.8×10~6V/cm,improving the short-circuit reliability by 18.2%.