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Design And Performance Analysis Of Network On Chip Of Domestic Multi-core Processor

Posted on:2021-02-28Degree:MasterType:Thesis
Country:ChinaCandidate:R Q DongFull Text:PDF
GTID:2428330629480369Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
With the continuous development of semiconductor technology and the rising demand for processor performance,on the single chip integration more processor core,memory controller interface and I/O device is the development trend of high-end processor chip.Multi-core has become the development trend of the chip,multi-core communication structure is key to improve the performance of the chip,network on chip is current mainstream on-chip communication scheme.In this thesis,based on the requirement of domestic multi-core processors,design on network,and analyze the impact of design on the network performance.In domestic multi-core processors,network on chip implement multiple core and the threelevel Cache,multiple memory channels and multiple PCIe interface connection between,bear the processor core and main memory,I/O devices and main memory,and the communication between the processor core,network on chip performance directly affects the overall performance of the chip.The work of this thesis content is as follows:1.This thesis introduces the related technology research on the network,including network topology,routing algorithm,exchange of technology,analyzes the common topology,routing algorithm,exchange mechanism and the difference between their respective advantages and disadvantages.2.Complete domestic multi-core processors network on chip design,design mainly has four aspects: topology,the network node,credit policy and the link mechanism of hunger.Choose ring topology network topology structure,to reduce the network delay,using bidirectional ring network.Network node contains data buffer,routing,credit management,arbitration,such as multiple modules,load data receiving and forwarding.Ring network outside the fixed credit strategy use a dynamic credit strategy,dynamic allocation of the target node in more than one network node buffer credit,for the effective use of the target node buffer resources.In order to avoid starvation phenomenon due to link hunger,ring network USES a fixed time slice the flow control mechanism of anti link hunger.3.Test the performance of the ring,Test index is network average throughput and average latency,analysis of the fixed time slices of the flow control mechanism of hunger,dynamic credit strategy may apply for the credit threshold of each node,and network nodes in FIFO clockwise and counterclockwise FIFO buffer depth of these design factors affect the performance of ring network.In this thesis,the fixed time slices of the flow control hunger mechanism can effectively handle link hunger,the average throughput and the average of ring network transmission delay won't cause great influence.Dynamic credit strategy may apply for the credit threshold of each node is 3,ring network performance is best.Network node in the FIFO clockwise and counterclockwise FIFO buffer depth is 4,ring network performance is good,suitable for practical use.
Keywords/Search Tags:Multi-core processors, Network on Chip, Hunger, Performance analysis
PDF Full Text Request
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