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Development Of Embedded Laser Dust Particle Counter System

Posted on:2022-08-21Degree:MasterType:Thesis
Country:ChinaCandidate:J P LiuFull Text:PDF
GTID:2480306488951139Subject:Computer technology
Abstract/Summary:PDF Full Text Request
With the continuous development of society,people have higher and higher requirements for production efficiency.More and more manufacture industry have realized that the concentration of floating particles in the workshop is an important factor affecting the production quality in the process of production and equipment manufacturing.Therefore,clean rooms for various applications have emerged as the times required.So how to judge the quantity or concentration of dust particles in the clean room more accurately,and how to design the function of the dust particle counter more in line with the actual work needs are the main content of this paper.Dust particles will produce high-speed pulse signal after passing through the optical structure sensor,and then sorted into TTL signal by voltage comparator.The traditional way of particle counting is to capture the pulse by single chip microcomputer to detect the jumping edge,and the screening voltage of the comparator is mainly manually adjusted by potentiometer.This structure is one of the important reasons for the deficiency of the domestic dust particle counter in the detection of concentration,accuracy and particle size resolution.Therefore,in view of these shortcomings,this paper designs a dust particle counter system which is used to detect 2.83L/min with high concentration environment.The system adopts the combination of 16 bit high-precision DAC,voltage comparator,FPGA pulse counter and single-chip microcomputer to optimize the software and hardware design of the traditional dust particle counter.The high-speed characteristics of FPGA are used to detect the jumping edge signal,and the DAC output is used to identify the reference voltage,which improves the speed and accuracy of pulse signal measurement.The control system uses STM32F103ZET6 as the main control chip and ATERA II EP2 CE as the counter chip.The software and hardware for real-time detection of battery charge and state of charge are designed by using STM32F103C8T6,and the battery charge and state of charge are synchronously displayed on the serial port screen.At the same time,a closed-loop control link is added to the gas flow control.The flow data of the measured gas is obtained by orifice plate flow measurement method,and the gas pump is driven by PID control mode,so that the gas flowing through the optical sensor is more uniform and the flow is more stable,which meets the requirement of2.83L/min of hand-held dust particle counter specified by the industry.The Human-computer interaction uses the Devon serial port screen,and the host computer editor program is used to design the screen,which realizes the functions of sampling parameters,counting mode,time display,historical record inquiry,sampling result and so on.The system can detect 0.3?m,0.5?m,0.7?m,1.0?m,3.0?m,5.0?m,7.0?m,10.0?m.The experimental results show that the detection efficiency of the dust particle counter designed in this paper meets the domestic standards.
Keywords/Search Tags:Dust particle counter, FPGA pulse counter, STM32, DAC, Voltage comparator, Constant flow control
PDF Full Text Request
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