Interface Treatment And Analysis Technology In Normally-off GaN-based MOS-HEMT

GaN-based metal-oxide-semiconductor high electron mobility transistor（MOS-HEMT）have demonstrated state-of-the-art performance for power electronics and microwave radio frequency applications.The high density two-dimensional electron gas in conventional Al GaN/GaN HEMTs results in normally-on devices,while normally-off operation is preferred to in practical circuits in terms of maintaining the system safety,reducing power consumption,and simplifying circuit design.Recess-gate MOS-HEMTs have been widely studied to achieve normally-off GaN-based devices,which have smaller leakage current and larger gate voltage swing compared with Schottky-gate HEMTs.However,there exist large amount of interface traps and border traps between gate dielectric and nitride semiconductor,being one of the critical issues that restrict the development of device performance and reliability.For recess-gate devices,the plasma etch process of gate trench may cause rough nitride surface,leading to worse interface quality of MOS-HEMTs.Therefore,interface treatment technology and the interface characteristics analysis were studied in this thesis.Finally,GaN-based recess-gate MOS-HEMT devices with high interface quality were achieved.The main works are as follows:1.The reason for the formation of two-dimensional electron gas in the Al GaN/GaN heterojunction in the GaN material and the principle of the field effect of recess-gate MOS-HEMTs were explained.The basic parameters of the Al GaN/GaN HEMT device were briefly introduced.Based on the working principle of the devices,this paper designed suitable device parameters and process steps,and completeed the fabrication of GaN-based normally-off MOS-HEMT device.2.This paper proposed an interface treatment process combining diffusion-controlled interface-oxidation（DCIO）and wet etch to effectively improve the damaged etched interface.The complete surface treatment method had four steps:（1）Chemical cleaning in an ammonia solution（1:6）at 55℃to remove surface residues;（2）Pre-deposit 1nm Al₂O₃as a diffusion control layer to fully oxidized the surface of the nitride in an oxygen plasma atmosphere;（3）Wet etching in 1:5 hydrochloric acid solution to remove the etched damaged surface;（4）Remote plasma in the plasma enhanced atomic layer deposition system Pretreatment to further remove surface oxides.Comparing this interface treatment method with traditional chemical cleaning and plasma pretreatment,it can be seen that this interface treatment process can effectively reduce the roughness of the interface and reduce the white particles on the surface.3.The DC performance test was carried out on GaN-based normally-off MOS-HEMTs with DCIO and wet etch treatment.The influence of the interface treatment process on the DC performance of the device was studied.It can be seen from the device transfer curve that the saturation currents of the untreated devices and the treated devices were 174m A/mm and 294m A/mm,and the transconductance peak values were 17 and40m S/mm,respectively.The field-effect mobility extracted by the interface-treated devices was 48 cm²/V·s,which was 33%larger than that of the conventionally-treated device.As the DCIO and wet etch treatment have reduced the sheet resistance under the gate by more than 30%,the output current of the device had increased by about 49.7%.According to the GTLM structure test results,the sheet resistance of the MOS-HEMT devices after DCIO and wet etch treatment was significantly reduced from 26529 to 16667Ω/sq.The breakdown test showed that by suppressing the generated leakage current,DCIO and wet etch treatment increased the soft breakdown of the device from 94 to 260V.4.The channel electrons were used to fill/release the interface traps and border traps under the bias of the gate voltage,resulting in the behavior of voltage drift.The defect traps of the Al₂O₃/GaN interface of the devices were quantitatively characterized by the capacitance-voltage method.The results showed that the density of interface traps in the MOS-HEMTs treated by DCIO and wet etch and untreated were 1.13×10¹²cm^-2and1.54×10¹²cm^-2,respectively;The DCIO and wet etch treatment made the device reduce the density of interface trap by 27%.When the program voltage was 15V,according to the accumulated voltage caused by the border traps,the density of border traps after DCIO and wet etch treatment and the untreated could be calculated as 6.35×10¹²cm^-2and7.73×10¹²cm^-2,which was reduced by 13.59%.Then the photo-assisted C-V method was used to characterize the state density distribution of border traps.By irradiating the MOS-HEMTs with photons of different energies,so that the defect traps gained energy and released electrons.Finally,the activation energy of the corresponding defect traps could be evaluated according to the energy corresponding to the photons.According to the change of the C-V curve after illumination,the state density distribution maps of the border traps were obtained.The peak state density D_Tof the border traps were 6.16×10¹²cm²·e V^-1and2.60×10¹²cm²·e V^-1,respectively.DCIO and wet etch process technology have basically reduced the state density of the border traps by about half.5.The interface defect traps of the MOS-HEMT three-terminal device was characterized by the low-frequency noise method with rich defect information and non-destructive testing.The amplitude of 1/f noise could qualitatively reflect the number of defects in the device interface.The normalized power spectral density of drain current noise and the function of drain current could be fitted to quantitatively analyze the density of defect traps.After calculation,the density of defect traps with/without the DCIO and wet etch were 7.94×10¹²cm^-2and 9.84×10¹²cm^-2,respectively.