Structural Design And Application Research Of Polysilicon-based TFET

Polysilicon thin film transistors have become critical devices in low-cost display panels,three-dimensional integrated circuits,and high-density memory applications.However,due to thermal electron emission,the traditional MOS structure transistors have the problems of poor subthreshold swing and large leakage current.Different from the working mechanism of polysilicon TFT,polysilicon TFET devices use the principle of quantum tunneling to obtain excellent sub-threshold swing and extremely low leakage current at room temperature.On the other hand,with the breakthrough of the polysilicon crystallization process,the grain boundary of the polysilicon channel can be controlled to a certain extent,so that the influence of the grain boundary barrier on the TFET transistor can well improve the performance of the capacitorless dynamic memory.Therefore,polysilicon TFETs can replace polysilicon TFTs and become the next generation polysilicon devices that can be used in low-power and high-density integrated circuits.This thesis firstly studies the influence of grain boundaries on polysilicon planar TFET and polysilicon LTFET based on the trap effect of grain boundary to get an optimal application scheme.Subsequently,studying the application of dual-gate polysilicon LTFET in storage systems such as the dynamic memory.The specific research contents are as follows:First,studing the parameters of polysilicon grain boundaries,and analying the effect of grain boundary traps to provide a basic physical model for the application of polysilicon TFETs.The grain boundary parameters of polysilicon thin films are complex,and the grain boundary trap effect causes the grain boundary potential barrier and forms the trap-assisted tunneling current.The analysis and utilization of the grain boundary is beneficial to the application of polysilicon devices.Secondly,discussing the effects of grain boundaries on the on-state current,subthreshold slope and off-state leakage current of polysilicon planar TFETs and polysilicon LTFETs in terms of the trap types,trap concentrations and grain boundary positions of polysilicon film grain boundaries.Finally,polysilicon double-gate LTFET improves the read"1"current,reduces the read"0"current,and prolongs the retention time for applying in dynamic memory.Analyze the working mechanism of the device using band-band tunneling to complete the reading and writing of the device and hold charges through the grain boundary.By optimizing the programming voltage to control the read-hold-write electric field,improving the performance of the device and reducing the power consumption of the device.Analyze the effect of recombination and grain boundary barrier,adjust the band-band tunneling electric field and reduce grain boundary charge recombination by optimizing the device structure（gate dielectric,channel thickness,gap distance between double gates,and grain boundary position）,prolong the hold time.Lastly,obtaining better device performance than the existing DRAM:the ratio of reading"1"to"0"is 3.72×10~2,the current difference is 25.2μA/μm,and the hold time is greater than 100ms.