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Keyword [Booth]
Result: 21 - 40 | Page: 2 of 4
21.
Research And Implementation Of Bit-Process Unit And Dual-MAC Unit Of FT-C55LP DSP
22.
A Design Of High-Performance Multiplier
23.
The Design And Implementation Of High Performance Multiplier Unit On DSP Chip
24.
Design And Implementation Of The Low-Power DSP Multiply-Add-Fused Unit
25.
Crucial Technology Research On High Performance Parallel Multiplier
26.
Design And Low Power Optimization Of Multiplier-accumulator For Digital Signal Processor
27.
The Research And The Implementation Of The Generic FFT Processor Based On FPGA
28.
The Design And Verification Of A YHFT-DX+ Multiplier Unit
29.
The Design And Implementation Of Floating-point Multiplier For YHFT-DX
30.
The Design And Verification Of An 18-bit Configurable Multiplier Which Based On Modified Booth Algorithm
31.
The Design Of Low-Power Multipliers Based On Booth Algorithm
32.
Floating-point Processing Unit Structures And Algorithms Research
33.
The Compatible Tms320c54xdsp Data Path Design
34.
Can Be Extended Plural Symbol The Number Of Fft Research And Asic Implementation
35.
Research And Design Of 8 Bit MCU Based On RISC
36.
Research On Semi-custom Design Method Of High-performance Parallel Multiplier
37.
Research Of Reconfigurable Techniques For Modular Multiplier In Galois Field
38.
Research And Optimization On Low Power Floating Point Multiply ADD Fused Unit
39.
The ASIC Design Of Low Power And Scalable Fast Fourier Transformation
40.
Design Of Multiplier IP Core For DSP
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