Multilevel Inverter Combination Topologies And Fault-tolerant Techniques In Multilevel Inverters

Multilevel converters have become a research hotspot in high-voltage and high-power applications because of their many advantages, such as their low voltage stress on power switches, low harmonic and EMI output. However, the existing multilevel topologies will be restricted in some applications for their disadvantages. Also, with the increase of level numbers, the multilevel topology and control method will be complicated, which will decrease the converter's reliability. Based on the above two points, this dissertation focuses on the research of multilevel topologies and fault-tolerant design.To overcome the disadvantages of traditional multilevel converters, the concept of hybrid clamped is proposed and some novel topologies are produced from this concept. A novel topology clamped by active and passive devices is researched in detail. In this topology, the DC link capacitor voltages can be balanced without additional circuitry or separated DC voltage sources, regardless of load characteristics. It can be used in real and reactive power conversion applications. The topology structure, operating principle and self-voltage balancing ability are analyzed. The validity is confirmed by simulations and experiments based on a five-level inverter. Also, the functions of different clamping devices are compared. The concept of hybrid clamped provides a new clue for constructing more multilevel converter topologies.In recent years, there is a new direction for multilevel converters to construct novel topologies producing higher quality waveforms with fewer devices. Two types of multilevel converter topologies are proposed for this direction, and their constructing rules and principles are researched. One is the combined diode clamped and combined flying capacitor multilevel topologies, which are derived by combining traditional diode clamped and flying capacitor multilevel topologies with two-level bridge legs. Another is a new capacitor voltage combination scheme for flying capacitor multilevel inverters, which considers a tradeoff between the switching states and capacitor voltage balancing. For this new combination scheme, the number of ouput voltage levels and capacitor voltage balancing are studied in different voltage ratios, and some original and significative conclusions are drawn. 1) Voltage stress of the main switch is equal to the voltage difference between two adjacent flying capacitors, the higher the voltage ratio, the larger the voltage stress. 2) The capacitor voltage can be kept balance if both of the voltage differences between the flying capacitor and the two adjacent capacitors are one voltage level. 3) For the sametopology, if more voltage levels can be produced, more voltage ratio setting methods are available, and fewer flying capacitor voltages can be balanced; vice versa. Both of the novel topologies can produce more voltage levels with fewer devices, so reliability of the circuit is improved and costs are reduced. However some of the devices in these topologies will sustain greater voltage stresses than the devices in the conventional multilevel converter topologies. Therefore they are more suitable for medium-voltage and high performance applications. The two novel types of topologies provide a new application direction for multilevel converters.Based on the idea of producing multilevel converter topologies from the concept of basic-cells, the construction method for cascaded multilevel inverter topologies is researched systematically and is unified in the category of basic-cells. Besides the existing cascaded multilevel topologies, some new hybrid switches and hybrid legs cascaded topologies are derived by combining different types of switches, different H-bridge cells and different DC voltage sources. Capacitor voltages are easier to be balanced in flying capacitor multilevel converters than in diode clamped multilevel converters, so the topologies cascaded by flying capacitor bridges are studied in detail. DC voltage ratio setting, modulation method and experimental verification are all included in t...