Research On Key Technology Of Tracking Loop Design For GNSS Receiver

With the rapid development of the GNSS global satellite navigation system, the research and development of the related technologies have attracted much attention. Satellite receiver is nessessary for GNSS to implement its PVT, and also to be known as a very important component of navigation systems. Tracking Loop is the key module inside a satellite receiver, and it is related to all the function what a receiver can do and what performances it can reach. For the reason that tracking loop is so widely used, generally speaking, it is side that design method of tracking loop is very thriving. But in the case of complex wireless signal conditions, or some circumstances that the SNR receiver get is changing in real time, a classic designed tracking loop, at most of the cases, will not work very well. For this reason, tracking loop design methods need to be analyzed very carefully. On the other side, BOC modulation brings with side peaks, and most of the popular research fields locates in how to surpress its side peaks. Seldom of them think that if the side peaks can be used or not, ever. It is believed that if the side peaks can be used, then much more correlation gain can be obtained, and mybe, more precise tracking loop can be realized.According to the problem of how to design perfect tracking loop in complex wireless or time varying SNR conditions, and how to use multi-peaks of the BOC signals at the same time, this thesis gives a very careful analyze from the point of carrier tracking loop and code tracking loop. Carrier and code tracking loop belongs to tracking loop, and carrier loop include FLL and PLL. So the research work in this thesis based on these three aspects.For code tracking loop, a new multi-peaks joint tracking strategy is proposed. Firstly, this thesis gives research on the BOC self-correlation and BOC/PRN correlation, discusses which peaks can be used at the same time, proposes the multi-peaks joint tracking strategy and a brand new multi-peaks discriminator. Secondly, derivation of discriminator function for the3CEMLP and3CDP is done, including the impact of the front-end bandwidth on the BOC self, BOC/PRN correlation and the property of discriminator curve under different correlation spaces. Finally, studies on the noise and multipath environment for the multi-peaks joint discriminator is also carried out. Results show that, by multiplying different weighting factor for different sub-discriminators, which locks on different correlation peaks, the tracking loop jitter variance of the whole loop can be minimized, resulting in an improvement of the tracking precision.For FLL, to design high performance FLL loop under complex wireless circumanstance, this thesis focuses on three points to guarantee it. That is: discriminator choosing, digital tracking loop design and FLL transient response research. Firstly, this thesis compares the four commonly used discriminators from discriminator gain, equivalent bandwidth, noise performance and tracking variance, providing a discriminator choosing rule for high performance FLL design method. Secondly, traditional receivers alway use analog filter design method and then being changed into digital ones, companying with design parameter distortion problems. For this problem, this thesis gives out a pure digital tracking loop filter design flow. Thirdly, discriminator gain is very important to loop transient response, this thesis proposes a real time loop gain compensation method in a varying SNR environment, resulting in an enough fast output response while suppressing the thermal noise at the maximum extent. Finally, for the problem of actual receiver design, this thesis proposes FLL-conj-added bit synchronizing method, solving the capture-track transferring-loose problem.For PLL, to design tracking loop which can work at its best performance all the time, this thesis pay great attentions on these four aspects:discriminator choosing, linear region analyze, discriminator gain compensation and loop "capturing" time. Firstly, this thesis compares the commonly used four discriminators from the aspects of discriminator gain, variance and linear region, including tracking loop variance with different discriminators, giving out the choosing method for different application cases. Secondly, statistics and analysis of the nonlinear PLL model is also carried out, and appropriate discriminator selection rule is also prompted to achieve a really short loop converging time. Finally, for the actual problem encountered in real PLL debug, obscure tracking and polarity power loosing, by optimizing the tracking loop state transferring machine and polarity compensated combined tracking, obscure tracking problem is solved and polarity power loosing, also been picked up, resulting in an steady tracking PLL.