Research On High Frequency Ultrasonic Diagnosis Of Flip Chip Flaws

Flip chip is a favorable technology for microelectronic packaging. It uses solder bumps to realize mechanical and electrical interconnection between chips and substrates, with the advantage of preferable alignment accuracy and short interconnection lines. As flip chip technology trends to high density and fine pitch with the introduction of Low-K and free-Pb materials, the chip power density will increase dramatically, the heat dissipation become more difficult, the scale effects will be more noticeable and the thermal/stress mismatch become more deteriorating. All the problems will cause stress concentration, inducing the solder bump failures. Besides, the solder bumps are hidden between the chip and the substrate. It makes the defect inspection of solder bumps more difficult. In this dissertation the high-frequency ultrasonic echo technic is utilized for nondestructive inspection of flip chips with missing bump defects, crack defects and high density Cu bump flip chips. The key diagnosis technologies are studied as follows.The flip chip finite element model for ultrasonic inspection was constructed based on ultrasound principle. We analized the effects of ultrasound propagation in the flip chip under different frequency through coupling the pressure-acoustic field and the solid-mechanic field. The high-frequency ultrasonic echo signals were extracted and the correspondence between the echo signals and the different interfaces were obtained by calculating the propagation time of different peak values. The resolutions of different frequency were also investigated. We introduced the missing bump defect, void defect and crack defect to the simulation model respectively, analized the ultrasonic propagation in these three interfaces of different defects, and revealed the effects of these three defects to ultrasound propagation. According to the simulation results we can carry out the experiments of ultrasonic inspection of flip chip flaws.The ultrasonic images of FA10flip chips with the typical defect of missing bumps were obtained by scanning acoustic microscopy and the correlation coefficient method was used for image segmentation. We extracted geometric and shape features from the solder bump image, i.e. the region of interest, via image processing methods including edge scanning, filling and feature extraction. The missing bump defect diagnosis model for FA10flip chips was established based on BP network, which was optimized with7neurons in the hidden layer. The image feature data were randomly selected for the BP network training, and the other dataset were used to testify the trained BP network. The classified results proved the major errors for the solder bumps detection occured on the edges, caused mainly by the edge effect. The SVM-classification model was constructed for inspection of2flip chips with high edge effect. The echo signal features extracted were added to the feature dataset for SVM training and testing. There were18solder bumps detected incorrectly in total and only7solder bumps detected incorrectly in the edges. The results showed that the recognition rate of this model was high and the edge effect was weakened.The echo signals of Pac2.1flip chips with cracks were captured by scanning acoustic microscopy. Three different features including time-domain features, frequency-domain features and wavelet packet decomposition features, were extracted as the initial high-dimension feature vector. The PCA was used for feature dimension reduction. An crack defect diagnosis model was presented based on SVM, which key parameters c and g were determined by cross-validation method. Through training with the PCA data, the model exported credible results with the recognition rate100%for good solder bumps and98.4%for solder bumps with cracks. There were only2solder bumps with cracks detected incorrectly.We fabricated high density Cu pillar flip chip based on electroplating and bonding technologies. The flip chip image was segmented by vertical projection method and the segmentation template was established. The classified model was constructed based on BP network for defect inspection of high density Cu pillar flip chips. The model was trained using the image feature data and applied for the other Cu pillar images. There were7solder bumps detected incorrectly of4flip chips, with the recognition rate98.55%. The classified results were validated by X-ray inspection and proved the high recognition rate of this model.This dissertation presented the feasibility of high-frequency ultrasound for defect inspection of flip chip flaws. In the future, we will focus on the mechanism of defect formation and realize the classification and recognition of several mixed defects in flip chips, up to online inspection.