Research On Control Strategy And Physical Emulation System Of MMC-HVDC System

Voltage Source Converter based High Voltage Direct Current (VSC-HVDC) projects have achieved a rapid expanding in the world. VSC-HVDC which is widely adaptable in new energy grid, transmission networks, distribution networks and other fields is changing the traditional structure of the AC grid. As one of the VSC topology structures, VSC-HVDC is suitable for high-voltage and high-power field, Modular Multilevel Converter (MMC) has received widespread attention. MMC-HVDC physical emulation system could be applied to study the operating characteristics of MMC-HVDC system, which can provide a necessary platform for the research and development of the control strategy, so it is of great significance in projects to study MMC-HVDC physical emulation system.1) Research on real time digital simulation model and Rapid Control Prototype (RCP) of MMC-HVDCFirstly, the operating principle of MMC and working principle of sub-module is briefly described, the basic control principle of MMC-HVDC is introduced and decoupled control strategy based on d-q axis is focused on. Then the Carrier Phase Shifted Sinusoidal Pulse Width Modulation (CPS-SPWM) and Nearest Level Control (NLC) based MMC internal modulation and capacitor voltage balancing algorithms are presented.After Real Time Digital Simulator (RTDS) and various small step models are introduced, the modeling method of MMC-HVDC real time digital model simulation is studied, the parameter setting method of cascaded multilevel converter CHINAV3 module is elaborated in detail, and the 11-level MMC-HVDC system model is set in which the self excitation startup, indirect current control, sub-module capacitor voltage balancing algorithm and the NLC control algorithm are achieved. Based on the PXI device, the RCP of MMC-HVDC control system is designed, the constant active power and constant AC voltage control program are developed and debugged, incremental PI regulator is customized, and the I/O ports of input and output boards are configured. Finally, the RTDS-PXI hybrid real time simulation system is built. The experiment results of hybrid real-time simulation show that the designed physical controller has the ability to control the AC voltage and active power effectively and presents desirable steady state and transient performances, which provides an effective way for designing the rapid control prototype of MMC-HVDC control system.2) Research on architecture of MMC-HVDC physical emulation systemThe architecture of the control system is studied in detail, A complete control system is established in sequence from high to low by the control system of the operating staff (PC), Pole Controller & Protection system (PCP), Valve Based Controller (VBC) and SMC. PC displays voltage and current signals of the primary system, and controls active and reactive power, and operates system breakers remotely. PCP receives reference value of active and reactive power from PC, and calculates modulation ratio and shift phase angle. VBC completes sorting of SM capacitor voltages and distributes trigger signals of SMs to SMC. And SMC controls and protects IGBTs reliably. Signal acquisition and condition equipment mainly completes acquisiting and conditioning the output signal of CT and PT. MMC-HVDC physical emulation system operation status is designed.The communication content and coordination control strategy among each control layer are established. The control system program is developed and debugged.As the characteristics of Insulate Gate Bipolar Transistor (IGBT) are not identical, when the MMC sub-module switching state is being transited, it is necessary to set dead time in order to protect capacitor. Firstly, the impact of direction of bridge arm current and sub-module switching state on the dead time deviation of single sub-module is studied. Secondly, considering the characteristics of CPS-SPWM in the ideal conditions, a precise Fourier series equation is established to the voltage error of converter AC side voltage. Then the formula of the equivalent fundamental wave amplitude, the actual output of fundamental wave amplitude, and angle offset for voltage error are derived by analyzing the impact of dead time on the fundamental current amplitude and phase of converter AC side voltage in the simplified way of average voltage, based on which the compensation method of voltage error is proposed. Then the impact of dead time on voltage in non-ideal condition is further analyzed. Finally, simulation results in PSCAD/EMTDC verified the correctness of the dead time analysis and effectiveness of the compensation method.3) Research on experiment of MMC-HVDC physical emulation systemThe primary system structure of MMC-HVDC physical emulation system is designed. According to different cabinets of MMC-HVDC physical emulation system, the primary device and secondary device in it are introduced, meanwhile and Sub-module hardware structure is designed and sub-module components are selected.The insulation test of sub-module is carried out to check its high-voltage characteristics. And the steady state test platform and control program of sub-module are designed. The steady-state no load and with load test are conducted. The test result shows that the sub-module property is good, SMC can communicate with VBC effectively and control the sub-module efficiently, and the steady-state test platform is valid.The systematic experiment is done on the MMC-HVDC physical emulation system, which can prove that the control system could realize efficient start and stop of the physical system, the capacitor voltage balance between the sub-modules, and the basic fault protection and the control of the DC voltage and power. And according to the found problems of controller in experiment, a improved design scheme of the controller is proposed.Sub-module capacitor voltage sorting method is an important part of capacitor voltage balancing algorithm. Firstly the time complexities of typical sorting methods are compared. Based on the characteristic of concurrent computation of MMC-HVDC control system and Field Programmable Gate Array (FPGA) in project, the sorting time of sub-module capacitor voltage is decreased with the idea of parallel sorting. Then by optimizing the uploaded data of sub-module capacitor voltages, on the one hand the uploaded data of SMC is decreased, on the other hand, the switching frequencies of devices are also reduced. And the simulation based on PSCAD verified the feasibility of optimized method.