| High-precision sigma-delta(ΣΔ) microaccelerometer with digital output has a wide application in the military and civil field, and switched-capacitor(SC)closed-loop digital microaccelerometer interface circuit can be easily implemented in CMOS process. Due to high signal-to-noise ratio(SNR), wide bandwidth and good linearity, it has been one of the main research aspects of inertial sensor interface circuit. High-precision digital microaccelerometer is one of the key components in seismic detector, therefore, the research on high-performance digital interface circuit is very meaningful for improving the overall performance and technical level in sensor interface circuit.At present, relevant theoretic research and design in the digital microaccelerometer can be improved. Further research is essential in noise theory,harmonic distortion model and verification, and interface circuit realization with sub-μg noise density. Several key issues of high-performance digital microaccelerometer were investigated in this paper, and high-precision interface circuit was achieved.The main circuit noise sources were determined in the analysis of digital microaccelerometer noise theory, and an accurate noise model was proposed. The current noise models ignored the contribution of tail transistor thermal noise to overall noise in the calculation of operational amplifier(op-amp) noise, but it was discussed in this paper by introducing a factor, thus promoting the accuracy. When analyzing the impact of op-amp bandwidth on interface circuit noise, the influence of op-amp settling accuracy and noise folding effect was comprehensively studied.After that an appropriate op-amp bandwidth was chosen, then the theoretical model was verified by experimental results.The previous research on harmonic distortion of ΣΔ microaccelerometer focused on the behavioral model simulation in Simulink. This paper introduced an op-amp direct current(DC) gain model, and an analytical model of harmonic distortion in the front-end charge conversion was achieved based on the conversion nonlinearity from proof mass displacement to capacitance variance. Combined with nonlinear electrostatic force feedback, a harmonic distortion theoretical model of quasi-linear closed-loop ΣΔ microaccelerometer was obtained. A SC self-test circuit was designed to substitute traditional measurement method to verify the harmonic distortion model. The model could provide theoretical guidance for the design of ΣΔ microaccelerometer parameters by simulation and test verification.In order to solve the stability problem of digital microaccelerometer usinghigh-Q sensing element and high-order modulator to ensure high-accuracy output,several methods were utilized:(1) An active lead compensator was proposed for heavy phase compensation to improve the system response;(2) The local feedback factor of modulator was off-chip adjustable to eliminate the effect of process variation, so that the interface circuit could be applied to different mechanical structures;(3) Through the optimization of parameters and gain scaling technology,the integrator’s output signal swing was reduced to improve the loop gain stability.A closed-loop high-precision ΣΔ microaccelerometer interface ASIC was implemented based on the proposed noise model and harmonic distortion model.The interface circuit mainly consisted of a low-noise charge converter, a correlated-double-sampling(CDS) and hold circuit, an active lead compensator, a modulator, a clock signal frequency dividing circuit and so on. It was fabricated in a standard 0.5μm two-metal two-poly N-well CMOS process. The power dissipation was 13 m W with a 5V supply, and the noise density was less than 1μg/Hz1/2. Meanwhile, the sensor had a sensitivity of 2.5V/g and an input range of ±0.7g. When the supply voltage was 7V, the power dissipation increased to 23 m W,resulting in an equivalent input acceleration noise density of less than 200ng/Hz1/2.The bandwidth, sensitivity and range of the microaccelerometer was 300 Hz,1.896V/g and ±1.2g, respectively. At the same time, the dynamic range in 1Hz bandwidth was 136 d B, the nonlinearity was 0.15%, and the bias instability was about 18μg.The theoretic research and circuit design of the closed-loop high-precision ΣΔmicroaccelerometer interface circuit in this paper can provide an important guidance for the technological progress of high performance microaccelerometer.Simultaneously, it has great market popularization and application value. |
PDF Full Text Request