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Admissibility Analyses For Time-Delay Descriptor Dynamic Input-Output Models

Posted on:2014-02-25Degree:DoctorType:Dissertation
Country:ChinaCandidate:Y Y ShaoFull Text:PDF
GTID:1229330398971278Subject:Management Science and Engineering
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In practical economics and management, most of the capital coefficient matrices of the dynamic input-output models are singular, thus, the models are called descriptor dynamic input-output models. Time-delay is widely found in dynamic input and output process. Considering the singularity of the capital coefficient matrices and time-delay, in this paper, the admissibility analyses of the descriptor dynamic input-output models are addressed. Using Lyapunov method, several admissibility conditions are given in terms of liner matrix inequalities. The abstract of the dissertation is as follows.1. On the premise of investment delays being multiple years, on the basis of the existing results, three descriptor dynamic input-output models with multiple delays are proposed progressively. By equivalent transformation, they are transformed into discrete-time descriptor systems with multiple delays. Then, some admissibility conditions are given by the theory of time-delay descriptor systems. Thus, the admissibility conditions of descriptor dynamic input-output models with multiple delays are obtained. In the practical economics and management systems, the admissibility of the considered systems are judged by the obtained admissibility conditions.2. H∞admissibility conditions of descriptor dynamic input-output models with external disturbance and delays are given. External changes could cause disturbances for they models and the restraint on external disturbances is measured by Hx performance index. This section presents H∞admissibility conditions of a class of discrete-time descriptor systems with external disturbances and constant delays, which provides the theoretical foundation for the restraint on external disturbances in economics and management systems.3. Admissibility conditions of descriptor dynamic input-output models with time-varying delays are given. This section presents admissibility conditions of a class of discrete-time descriptor systems with time-varying delays. The approach is discrete-time descriptor systems with time-varying delays are regarded as discrete-time descriptor systems with constant delays. The admissibility conditions of systems with time-varying delays are obtained from those with constant delays, which provides the theoretical foundation for dynamic input-output models with time-varying delays in economics and management systems.
Keywords/Search Tags:Descriptor dynamic input-output models, Time-delay, Admissibilityanalyses, Discrete-time descriptor systems with delays
PDF Full Text Request
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