Key Techniques Of Single Phase Single Stage Power Factor Correction Based On Full Bridge Topology

Power factor correction (PFC) technique is an effective method for reducingthe harmonic current of power electronic device and increasing the power factor.Single-stage full-bridge PFC technique is preeminent in simple structure and highefficiency, furthermore, its high frequency transformer exciting by double-ended, soit is suitable for medium and high power application. At present, this technique isrelatively mature in the research such as efficiency, power facror and so on.However, there are still some problems limiting the application of this technique incircuit structure, such as large DC-bus voltage spike, magnetic bias of thetransformer, input inductor over current in starting-up process and large outputvoltage ripple. Presently, the solutions to those problems have been proposedalready, but each scheme can solve only one problem, and the circuit structure iscomplex when all the schemes have been used. So, it is necessary to research thosekey techniques and use simple circuit structures solving some or all of the probl emssimultaneously.Because of the exsiting of leakage inductance in the transformer, there is alarge voltage spike on the bus during the circuit commutation process. The problemof voltage spike can be solved with the adoption of clamp technique. Single-stagefull-bridge PFC converter based on active clamp technique is investigated, and thetheoretical analysis is verified by experimental results. According to thedisadvantages of this converter, a novel single-stage PFC converter based on passiveclamptive technique is proposed. Its operational principle and the mechanism ofvoltage spike suppression are analyzed. Finally, the validity of theoretical analysisis proved by experimental results.Because of the special working mechanism and the required power factorcorrection, the magnetic bias of the transformer appears, by which the stability ofthe converter has been influenced. A novel suppressing approach is proposed basedon the analysis of the magnetic bias mechanism. With the help of clamp technique,the dead zone can be appended in the synchronous timing control of switches, andthe voltage-second balance of the transformer can be achieved by the varying of thedead zone. The proposed scheme can solve the problem without increasing thecomplexity of the circuit, while maintaining its original performance, and it isappropriate in both digital and analog control. The influence rules of key parameterare concluded, the circuit based on integrate reset are designed. The feasibility andadvantage of the proposed approach is verified by the experimental results.Over current of the input inductor appears during the starting-up process of this PFC converter, which can reduce the reliability of the whole system. A novel Buckstarting-up scheme is proposed according to the clamp circuit, which made thestarting process smoothly. By changing synchronous timing of the switches, thescheme can solve the problem without increasing the complexity of the circuitry,while maintaining its normal operation and original performance. The process ofstaring-up and the input current are analyzed by using simplified models of theconverter, and the design methods of the key parameters are given. As experimentalproved, over current in the starting process is suppressed, and the theoreticalanalysis is validity.Single-stage full-bridge power factor corrector realizes PFC and DC/DCconversion in one stage circuit, so there is large voltage ripple in the output sidewhose frequency is double of line frequency, the output characteristic of theconverter is influenced. As a conventional method, increasing the output filtercapacitance could reduce the ripple, while the dynamic response can be reduced. Anovel output-voltage-ripple suppression scheme is proposed in the single stage full-bridge PFC converter based on auxiliary part, which can lower the output voltageripple by controlling the output current of auxiliary part. The influence rules of keyparameters are analyzed, such as the output current of auxiliary part and power ofauxiliary part. As the experiment proved, output voltage ripple is suppressedwithout influenceing the dynamic response by using this scheme.