Research On The Modulation Strategy Of Dual Three-level Inverter For Open-end Winding Induction Motor Drives

With the development of science and technology, the demand of high voltage,large capacity and low cost for power converters is daily increasing in the occasion ofindustrial production, transportation and so on. Dual three-level inverters fed with anopen-end winding induction motor (dual-terminal cascaded five-level inverter) caneffectively increase the rating of output voltage and the number of output level in thedual-inverter system. Thus, the dual-inverter topology has great significance inachieving the conversion of high voltage and large power for the using of switchingdevices with low power rating. A variety of five-level SVPWM modulation strategiesare proposed for different modulation purposes.In this dissertation, the so called dual-terminal cascaded five-level inverter istreated as the object of study. The problems, such as the zero-sequence voltagesuppression, nuetral-point potential balance, dead-time compensation, narrow-pulseelimination and so on, existed in the dual-inverter modulation strategy are researched.Firstly, the topology of dual-terminal cascaded five-level inverter is analyzed and729kinds of synthetic voltage-vector combinations of this inverter as aforementionedare listed. Mathematical models of the dual-inverter topology with common dc-linkstructure and independent dc-link structure are respectively established and the effectsof different switching states on the dc-link capacitor voltage with the two differentdc-link structures aforementioned are researched. According to the characteristics ofthe dual-terminal cascaded topology, the common-mode voltage, which is produced intraditional single-inverter system, is decomposed into zero-sequence voltage andcommon-mode voltage for analysis.Secondly, according to the fault-tolerant characteristics of the dual-terminalcascaded five-level inverter, the main circuit of fault-tolerant control system isdesigned. When the system fails, the control process and the path of load current areanalyzed in this fault situation. In order to meet the requirements of fault-tolerantcontrol system, a fault-tolerant modulation strategy is proposed. This modulationstrategy, which is based on a three-level simplified algorithm, controls theneutral-point potential by detecting the dc-link capacitor voltages. In order to solve the problem of zero-sequence circulating current in the commondc-link system, a SVPWM strategy based on zero common-mode voltage vectors isproposed to completely eliminate zero-sequence voltage and common-mode voltagein the system. This strategy is based on the method of line-voltage coordinate. Theselection principle of starting voltage vector depends on the analysis of the effects ofdifferent zero common-mode voltage vectors on the neutral-point potential. Thetheory of optimal space-vector location is adopted to achieve optimal control andreduce the output harmonic content.For the purpose of simplifying the modulation, a modulation strategy ofeliminating the average common-mode voltage is proposed in this dissertation. Thisstrategy, which combines the simplified algorithm and space-vector decouplingmethod, can extremely simplified the modulation process and shorten the runningtime of program. By changing the effective-time Teffposition within a switching cycle,the average values of common-mode voltage and zero-sequence voltage, which aregenerated in the dual inverter system within half a switching cycle, are zero, makingzero-sequence current suppressed, while achieving the dynamic balancing ofneutral-point potential.To reduce the switching loss, a modulation strategy, which is based on the abovemethod of eliminating common-mode voltage in the average sense, with the zerocommon-mode voltage vector clamped, is proposed in the dissertation. Under thepremise of adopting the same sampling frequency, employing the operating modewith two inverters alternately clamped is able to reduce switching losses. Theneutral-point potential is balanced by combining using the balancing-factor methodand adopting the working mode of alternately clamping two inverters. In order toavoid the leapfrog-jump phenomenon of pole voltage of the inverter(n→p or p→n),when the inverter is switched between normal state and clamped state, zero vector isselected as the clamped vector when the modulation index m is lower than0.5.Finally, two solutions of the time compensation and voltage compensation,which are based on the analysis of dead-time effect of the dual-terminal cascadedfive-level inverter, are given to compensate the dead-time effect. A strategy, which isin view of the analysis of the method of narrow-pulse elimination, of taking both thedead-time compensation and narrow-pulse elimination into consideration is proposedin this dissertation.There are83figures,14tables and165references in this dissertation.