| Modular Multilevel Converter (MMC) is both an emerging topology and an adequate candidate in high power high voltage applications. From the topology perspective, MMC can be considered as a synthesis of the conventional Flying Capacitor Converter (FCC) and Cascaded H-Bridge Converter (CHBC) structures that features both modularization and high DC voltage accessibility. The wide application of MMC in-cludes but not limits to High Voltage Direct Current Transmission (HVDC), Unified Power Flow Controller(UPFC) and Power Electronic Transformer (PET),all of which have provided the necessary technique support for the rapid development of the future smart grid. Therefore, the research on MMC is of signifi-cant theoretical and practical value and will continuously contribute to the development of future power system.With the basic knowledge of the MMC topological properties as well as the purpose of improving the MMC performance, this dissertation details the mathematical model, modulation strategy, control scheme and parameter design and provides an in-depth analysis and optimization of these techniques. Specific re-search contents and original contributions are as follows:(1) A new low-order average model for the PSC-PWM modulated MMC is established using decom-posed dependent sources, where both the grid side and the sub-module side are separated into two inde-pendent circuits, namely common- and differential-mode circuits. This model not only provides a theoreti-cal foundation for the need to analyze the possible harmonic frequencies, but also guides the design of op-timal modulation and control methods.(2) A new feed-forward strategy for suppressing low-order harmonic circulating currents in PSC-PWM-based MMC is proposed. This approach is based on the new average model established which identifies the cross-coupling interactions between the system level and sub-module elements. As well as improving the damping of the system, the major advantage of this approach is that it maintains the natural DC bus balance property of a PWM modulated MMC by considering the upper and lower arms together(unlike existing feed-forward schemes which treat each MMC arm independently). Moreover, unlike exist-ing direct control resonant strategies, which require careful gain tuning and are highly dependent on the AC system frequency, the proposed approach achieves wideband circulating current ripple suppression without requiring knowledge of the circulating current harmonic frequencies,and needs only a simple PI controller to regulate the circulating current DC component for power balance. This makes it particularly suitable for use in multi-frequency or variable-frequency AC systems.(3) A state machine based pulse distributor is proposed for centralized modulation strategies used in MMC, focusing on evenly distributing the pulse transients among all the sub-modules. By appropriately selecting the redundant states for every given level, the total turn-on and turn-off periods of each sub-module are controlled to be approximately identical which guarantees the natural balance of the DC-link capacitor voltages, without the need to use the enormous DC voltage sensors and active balance controllers. Moreover, a state change enforcement mechanism is designed for lower frequency scenarios where only part of the state machine can be travelled through. By following this mechanism, the states and pathways in the state machine are able to be fully selected within an appropriate period. In the meantime,minimal extra switch transitions are assured. Therefore, the natural balance of the DC-link voltages in low-er frequency conditions is achieved with almost the same module switching frequencies.(4) Although the pulse disposition pulse width modulation (PD-PWM) achieves the best possible three-phase line-to-line output voltage spectrum, the circulating current drifting phenomenon can be ob-served when it is applied to the 2N+1 level MMC. This current drifting will cause the magnetic saturation of the arm inductor, which indirectly increases its design requirement. To overcome this issue, a circulating current optimization approach is proposed by enforcing a current reversal within each voltage band transi-tion. As a result,this technique achieves a constant DC component in the circulating current for the 2N+1 PD-PWM scheme at the expense of only two extra switch operations within each transition region,Fur-thermore, an active low-order circulating current control is proposed in this chapter for the cases where inductors and submodule capacitors are relatively smaller. This approach achieves an optimized circulating current ripple through actively controlling this current to approach the command,though the DC bus volt-age natural balance is slightly compromised.(5) As indicated by control theory that the system delay is what limits the system bandwidth, an optimal control parameter design method is presented. Moreover, after an analytical comparison between the dis-tributed and centralized modulation strategies, this chapter indicates that the phase shift carrier pulse width modulation (PSC-PWM) is only suitable for higher module switching frequency applications when used in closed-loop systems. The reason is that its delay is dominated by the module carrier frequency rather than the overall equivalent frequency with a bottom-to-top design fashion. In contrast, the centralized strategies such as APOD-PWM are more suitable for such scenarios as it considers the overall output voltage directly using a top-to-bottom design criterion. Under this consideration, all the sub-modules are able to respond to the current variations simultaneously where the delay is only dependent on the equivalent switching fre-quency. As a result,this strategy is more adequate for lower module switching frequency occasions.Finally, a brief description of the down-scaled experiment platform is given and sufficient tests have been performed to show the effectiveness of the proposed optimized modulation and control approaches introduced and discussed above. |
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