PWM Noise Reduction For Three-phase Voltage Source Inverters

PWM?pulse width modulation?technique is the most frequently employed in converter.However,the PWM harmonics causing by PWM would weaken the performance of voltage source inverter?VSI?system,resulting in motor torque ripple,vibration,acoustic noise,additional losses in motor stator.These issues may damage the mechanical structure and the fault-tolerant capability of system.Thus,PWM harmonics suppression is necessary for VSI system.This paper will study the reduction of differential mode components causing by PWM.The RPWM-based?random PWM?technique,sine wave filters and multi-topology are common for PWM harmonics suppression,which would increase the size and cost of system or the reduction of PWM harmonics is unacceptable.This paper proposed more effective PWM harmonics suppression method based on existing techniques for three-phase VSIs,which has important practical and great theoretical significance.The MSVPWM?modified SVPWM?technique and MS-SVPWM?modified single-edge SVPWM?technique is proposed based on the conventional SVPWM technique.The time-varying voltage of MSVPWM technique is expressed as a summation of harmonic components by double Fourier integral.MSVPWM's implementation in digital control chip is listed.The proposed MSVPWM technique could almost remove the carrier frequency PWM harmonics by exchanging the active vectors in each carrier cycle based on double-edge regularly sampled SVPWM technique?center aligned SVPWM technique?.In order to remove the carrier frequency PWM harmonics,the MS-SVPWM technique is proposed by adjusting the zero vectors V₀ and V₇ based on single-edge regularly sampled SVPWM technique.Its harmonic component expressions and implementation method are shown.The switching losses analysis of MS-SVPWM technique is also shown in this part.Computer simulation analysis and experimental results confirm that MSVPWM technique could remove the carrier frequency PWM harmonics and the switching frequency of MS-SVPWM technique is reduced compared with conventional SVPWM technique.The hybrid PWM technique consisting of MSVPWM or MS-SVPWM technique and RPWM technique or PCFM?periodic carrier frequency modulation?technique could reduce more PWM harmonics.By changing the carrier frequency of MSVPWM or MS-SVPWM technique according to random or periodic functions,the hybrid carrier frequency modulation technique is proposed based on the technically compatibility of the RPWM or PCFM technique and MSVPWM or MS-SVPWM technique.The simulation results and experimental results confirm that the more carrier frequency PWM harmonics could be reduced by the hybrid PWM technique.The PWM harmonics will be moved to lower frequency area due to the varying carrier frequency of RPWM or PCFM technique,which could be solved by HMRPWM technique.The isolated and hybrid interleaved topology is proposed based on the no-isolated interleaved topology with coupled inductors.The voltage expressions of topology and equivalent circuit of each frequency component in no-isolated topology are shown.As we known,the fault-tolerant capability of no-isolated interleaved topology is weak.Thus,the isolated and hybrid interleaved topology is proposed based on the conventional interleaved topology using to drive the multi-segmented motors.The isolated interleaved topology has better fault-tolerant capability by comparison with no-isolated interleaved topology.The fault-tolerant capability of motor driving system and PWM harmonics suppression performance is mixed in hybrid interleaved topology.The no-isolated and isolated interleaved topology is the special case of the hybrid interleaved topology.Three integrated PWM harmonics suppression techniques are proposed by employing MSVPWM or MS-SVPWM technique in VSIs of no-isolated or isolated interleaved topology instead of conventional SVPWM technique,which could expand the frequency area of PWM harmonics suppressed with the same number VSIs.The MS-SVPWM technique could remove the odd times of carrier frequency PWM harmonics and the even ones are reduced by interleaved topology.These techniques which composed by circuits in hardware and PWM technique in software,could suppress the PWM harmonics more effectively and increase the PWM harmonics frequency left with the same number of VSIs in interleaved topology and the same switching frequency.The simulation results and experimental results confirm that integrated PWM harmonics suppression techniques could reduce PWM harmonics more effectively.