Optimization Model And Hardware Implementation Of P-M Method For Satellite Relative Attitude And Absolute Attitude Solution

With the rapid development of modern sensing technology and MEMS(Micro-ElectroMechanical Systems)technology,the computation power of FPGA(Field Programmable Gate Array)is greatly improved,which makes the remote sensing images on-board real-time processing become possible.To on-board processing of the model-based image algorithms,the satellite attitude parameters obtained in real-time are necessary.This thesis proposes an on-board solution method for satellite relative attitude and absolute attitude.The main work and contributions of thesis are presented:(1)the optimization models of P-H(Pope-Hinsken)method for satellite relative attitude and absolute attitude solution are designed,and the FPGA implementations of the models are done.In the optimized models,the Eulerian angle is replaced by the unit quaternion in description of satellite attitude parameters.A P-H method is used to optimize the solving process from “indirect adjustment with constraints” to “indirect adjustment”,which reduces the algorithm complexity and increases the computing speed.In FPGA implementation state,a double precision floating point number with 64 bits and a combining strategy of serial computing and parallel computing are adopted,which ensure the precision and speed with a low hardware resource consumption;(2)To obtain the point correspondences for satellite relative attitude and absolute attitude solution,an optimization algorithms of detection and matching algorithm for local feature and/or corner feature are proposed.In optimization algorithm,the SURF(Speeded Up Robust Features)+BRIEF(Binary Robust Independent Elementary Features)is proposed for local feature,the FAST(Features from Accelerated Segment Test)+BRIEF is proposed for corner feature,a slope method and a correlation coefficient method are combined to remove the outliers,a centroid method is adopted to achieve the sub-pixel location of the correctly point correspondences.Those algorithms are optimized for implementation in FPGA with the fixed number;(3)To read the sub-image from DDR3(Double Data Rate 3),a remainder-based reading method is proposed.In this method,the quotient and remainder are determined from the left column divided by 8 and the least reading addresses are generated by the quotient and remainder.The reading sub-image is used for BRIEF descriptor generation,correlation coefficient computation and centroid position determination;(4)Matrix inversion is inevitable in satellite attitude solution.To reduce the consumption of hardware resources of FPGA,a block LU decomposition is designed in FPGA platform.A large matrix is divided into four small ones and the four small ones are decomposed into LU form by FPGA in parallel,which speedup the computation process and reduce the consumption of hardware resources;(5)The experimental results show that the optimized algorithm is suitable for image pairs with different textures,spatial resolutions,also has a good performance in image pairs with small change in light,rotate and viewpoint.In satellite attitude solution,the optimization models avoid the computations of trigonometric function and have an excellent performance in initial value selection,iteration number and convergence.The speedup of FPGA implementation of the optimized models is about 10 comparing with PC.