| Organic field-effect transistors(OFETs)have attracted much attention owing to their various potential applications,such as flexible displays,sensors,radio-frequency identification tags,etc.Great progresses have been made,i.e.,the performance of OFETs comparable to that of amorphous silicon field effect transistors.From the viewpoint of practical applications,OFETs still face the challenges,including the device performance needed to be further improved,the explanation of intrinsic correlation between the thin-film microstructure and the corresponding device performance,and the operating voltages needed to be reduced to several volts.In this thesis,we mainly focus on three aspects,namely,improving the performance of CuPc-based FETs and explain the relationship between the structure of the CuPc thin film and the carrier transport,using high-κ lanthanide compound as insulating layer to reduce the operating voltage of pentacene-based FETs,and constructing the ferroelectric field effect transistor memory.The major work is summarized as the followings:(1)Our previous study has shown that high deposition pressure(Pdep)modulated CuPc molecules to be more perpendicular to the Sio2/Si substrate,and large d-spacing favored carrier mobility(μ)In this dissertation,detailed investigations reveal that CuPc molecules become more π-π stacking as the d-spacing increased,and charge transport between adjacent molecules in the active layer was enhanced.It is important to understand the relationship between the structure and the carrier mobility.Furthermore,the Y function method clearly indicated device property improved when Pdep increased.(2)We have successfully fabricated low-voltage pentacene-based FETs by using complex OTS/PVA/Eu(tta)3L as gate dielectric.The insulating layer has root mean square(RMS)roughness value of 0.476 nm.Low leakage current densities(-5-+5 V,10-9-10-7A cm-2)and relatively high capacitance density(33 nF cm-2)and relative dielectric constant(11).The field-effect mobility(μ)is 0.17cm2 V1 s-1 at-5 V,comparable to SiO2 insulator(0.13 cm2 V-1 s-1 at-30 V);on/off ratio is 5×103;threshold voltage(Vt),and subthreshold swing(S)are-0.9 V and 1.0 V dec-1,which are obviously superior to those of SiO2/Si substrates(-7.3 V and 3.1 V dec-1).It is of significance to develop low-voltage OFETs based on high-κ lanthanide complexes as gate insulator.(3)The domain size of the ferroelectric copolymer blends[P(VDF-TrFE)/P(VDF-TrFE-CFE)]can be modulated in the range of 16.6-10.7 nm.The copolymer was applied as insulating layer,pentacene as organic semiconductor layer to make the Fe-FET.With P(VDF-TrFE-CFE)blend ratio increases from 0 to 15%,read voltage reduces from-30 to-20 V.The on/off ratio of the device can be maintained at the level of more than 102.Time-dependent retention shows highly reliable data retention up to 104 s. |